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authorsos <sos@FreeBSD.org>2002-03-03 15:36:21 +0000
committersos <sos@FreeBSD.org>2002-03-03 15:36:21 +0000
commit8703cd1dab6dbe7f403e5b11f0d2933202c39460 (patch)
treed5f8bfc50fb2ae83f2d3057e77f54c441c8bb65c /sys/dev/ata/ata-dma.c
parent8207872db749971894f9cbcb5baf92b0defdc929 (diff)
downloadFreeBSD-src-8703cd1dab6dbe7f403e5b11f0d2933202c39460.zip
FreeBSD-src-8703cd1dab6dbe7f403e5b11f0d2933202c39460.tar.gz
Major update of the ATA RAID code, part 3:
Add code to properly detach/attach disks that are part of a RAID. Mark a disk that is attached on an ATA channel belonging to a RAID as a spare disk that can be used for rebuilding failed RAID1's. Add support for rebuilding failed RAID1's. Several fixes to the detach/attach code. For replacing a disk in a failed RAID1 do the following: Find the controller channel# of the failed disk. Exec 'atacontrol detach <channel#>' to free the disk from the system. Replace the failed disk with a new one of at least the same size. If your have your disks in drawers/enclosures this can be done with the system still running. Exec 'atacontrol attach <channel#>' to add the disk to the system and mark it as a valid spare for rebuild. Exec 'atacontrol rebuild <array#>' The system will rebuild the array on the fly, the array can still be used during this, although with slower performance. Please let me know of any problems with this! Sponsored by: Advanis Inc. MFC after: 2 weeks
Diffstat (limited to 'sys/dev/ata/ata-dma.c')
-rw-r--r--sys/dev/ata/ata-dma.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/sys/dev/ata/ata-dma.c b/sys/dev/ata/ata-dma.c
index 8db7a7b..3f2abc5 100644
--- a/sys/dev/ata/ata-dma.c
+++ b/sys/dev/ata/ata-dma.c
@@ -1225,11 +1225,11 @@ hpt_timing(struct ata_channel *ch, int devno, int mode)
case ATA_PIO2: timing = 0x0a81f454; break;
case ATA_PIO3: timing = 0x0a81f443; break;
case ATA_PIO4: timing = 0x0a81f442; break;
- case ATA_WDMA2: timing = 0x22808242; break;
- case ATA_UDMA2: timing = 0x120c8242; break;
- case ATA_UDMA4: timing = 0x12ac8242; break;
- case ATA_UDMA5: timing = 0x12848242; break;
- case ATA_UDMA6: timing = 0x12808242; break;
+ case ATA_WDMA2: timing = 0x22808242; break;
+ case ATA_UDMA2: timing = 0x120c8242; break;
+ case ATA_UDMA4: timing = 0x12ac8242; break;
+ case ATA_UDMA5: timing = 0x12848242; break;
+ case ATA_UDMA6: timing = 0x12808242; break;
default: timing = 0x0d029d5e;
}
pci_write_config(parent, 0x40 + (devno << 2) , timing, 4);
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