summaryrefslogtreecommitdiffstats
path: root/sys/dev/asr
diff options
context:
space:
mode:
authorscottl <scottl@FreeBSD.org>2001-08-21 19:58:16 +0000
committerscottl <scottl@FreeBSD.org>2001-08-21 19:58:16 +0000
commit4c62004cf77dc1b9f69be9f84bb3cce6f9d5de8c (patch)
treec793aa7d3ef4aa9181a55c13fb22ee95fc24acac /sys/dev/asr
parent5aeaee9fa9c5f5b204c922f8646eee5641050703 (diff)
downloadFreeBSD-src-4c62004cf77dc1b9f69be9f84bb3cce6f9d5de8c.zip
FreeBSD-src-4c62004cf77dc1b9f69be9f84bb3cce6f9d5de8c.tar.gz
Fresh code drop from the vendor. This fixes some critical bugs and adds
support for a new class of controllers. Also adjust MAINTAINER at the approval of msmith. Obtained from: mark_salyzyn@adaptec.com
Diffstat (limited to 'sys/dev/asr')
-rw-r--r--sys/dev/asr/MAINTAINER2
-rw-r--r--sys/dev/asr/asr.c606
-rw-r--r--sys/dev/asr/dptsig.h81
-rw-r--r--sys/dev/asr/i2omsg.h39
-rw-r--r--sys/dev/asr/osd_defs.h2
-rw-r--r--sys/dev/asr/osd_unix.h2
-rw-r--r--sys/dev/asr/osd_util.h2
-rw-r--r--sys/dev/asr/sys_info.h2
8 files changed, 542 insertions, 194 deletions
diff --git a/sys/dev/asr/MAINTAINER b/sys/dev/asr/MAINTAINER
index 084a690..5acec7d 100644
--- a/sys/dev/asr/MAINTAINER
+++ b/sys/dev/asr/MAINTAINER
@@ -1,2 +1,2 @@
$FreeBSD$
-MAINTAINER = msmith@freebsd.org, mark_salyzyn@adaptec.com
+MAINTAINER = mark_salyzyn@adaptec.com, scott_long@btc.adaptec.com
diff --git a/sys/dev/asr/asr.c b/sys/dev/asr/asr.c
index 03311e8..f755c54 100644
--- a/sys/dev/asr/asr.c
+++ b/sys/dev/asr/asr.c
@@ -1,7 +1,7 @@
/* $FreeBSD$ */
/*
* Copyright (c) 1996-2000 Distributed Processing Technology Corporation
- * Copyright (c) 2000 Adaptec Corporation
+ * Copyright (c) 2000-2001 Adaptec Corporation
* All rights reserved.
*
* TERMS AND CONDITIONS OF USE
@@ -23,6 +23,39 @@
*
* SCSI I2O host adapter driver
*
+ * V1.08 2001/08/21 Mark_Salyzyn@adaptec.com
+ * - The 2000S and 2005S do not initialize on some machines,
+ * increased timeout to 255ms from 50ms for the StatusGet
+ * command.
+ * V1.07 2001/05/22 Mark_Salyzyn@adaptec.com
+ * - I knew this one was too good to be true. The error return
+ * on ioctl commands needs to be compared to CAM_REQ_CMP, not
+ * to the bit masked status.
+ * V1.06 2001/05/08 Mark_Salyzyn@adaptec.com
+ * - The 2005S that was supported is affectionately called the
+ * Conjoined BAR Firmware. In order to support RAID-5 in a
+ * 16MB low-cost configuration, Firmware was forced to go
+ * to a Split BAR Firmware. This requires a separate IOP and
+ * Messaging base address.
+ * V1.05 2001/04/25 Mark_Salyzyn@adaptec.com
+ * - Handle support for 2005S Zero Channel RAID solution.
+ * - System locked up if the Adapter locked up. Do not try
+ * to send other commands if the resetIOP command fails. The
+ * fail outstanding command discovery loop was flawed as the
+ * removal of the command from the list prevented discovering
+ * all the commands.
+ * - Comment changes to clarify driver.
+ * - SysInfo searched for an EATA SmartROM, not an I2O SmartROM.
+ * - We do not use the AC_FOUND_DEV event because of I2O.
+ * Removed asr_async.
+ * V1.04 2000/09/22 Mark_Salyzyn@adaptec.com, msmith@freebsd.org,
+ * lampa@fee.vutbr.cz and Scott_Long@adaptec.com.
+ * - Removed support for PM1554, PM2554 and PM2654 in Mode-0
+ * mode as this is confused with competitor adapters in run
+ * mode.
+ * - critical locking needed in ASR_ccbAdd and ASR_ccbRemove
+ * to prevent operating system panic.
+ * - moved default major number to 154 from 97.
* V1.03 2000/07/12 Mark_Salyzyn@adaptec.com
* - The controller is not actually an ASR (Adaptec SCSI RAID)
* series that is visible, it's more of an internal code name.
@@ -74,13 +107,13 @@
#define ASR_VERSION 1
#define ASR_REVISION '0'
-#define ASR_SUBREVISION '3'
-#define ASR_MONTH 7
-#define ASR_DAY 12
-#define ASR_YEAR 2000 - 1980
+#define ASR_SUBREVISION '8'
+#define ASR_MONTH 8
+#define ASR_DAY 21
+#define ASR_YEAR 2001 - 1980
/*
- * Debug macros to resude the unsightly ifdefs
+ * Debug macros to reduce the unsightly ifdefs
*/
#if (defined(DEBUG_ASR) || defined(DEBUG_ASR_USR_CMD) || defined(DEBUG_ASR_CMD))
# define debug_asr_message(message) \
@@ -244,7 +277,9 @@ static dpt_sig_S ASR_sig = {
#define MAX_INBOUND 2000 /* Max CCBs, Also Max Queue Size */
#define MAX_OUTBOUND 256 /* Maximum outbound frames/adapter */
#define MAX_INBOUND_SIZE 512 /* Maximum inbound frame size */
-#define MAX_MAP 4194304L /* Maximum mapping size of IOP */
+#define MAX_MAP 4194304L /* Maximum mapping size of IOP */
+ /* Also serves as the minimum map for */
+ /* the 2005S zero channel RAID product */
/**************************************************************************
** ASR Host Adapter structure - One Structure For Each Host Adapter That **
@@ -295,17 +330,18 @@ typedef struct Asr_softc {
u_int16_t ha_irq;
void * ha_Base; /* base port for each board */
u_int8_t * volatile ha_blinkLED;
- i2oRegs_t * ha_Virt; /* Base address of adapter */
+ i2oRegs_t * ha_Virt; /* Base address of IOP */
+ U8 * ha_Fvirt; /* Base address of Frames */
I2O_IOP_ENTRY ha_SystemTable;
LIST_HEAD(,ccb_hdr) ha_ccb; /* ccbs in use */
struct cam_path * ha_path[MAX_CHANNEL+1];
struct cam_sim * ha_sim[MAX_CHANNEL+1];
#if __FreeBSD_version >= 400000
struct resource * ha_mem_res;
+ struct resource * ha_mes_res;
struct resource * ha_irq_res;
void * ha_intr;
#endif
- u_int8_t ha_adapter_target[MAX_CHANNEL+1];
PI2O_LCT ha_LCT; /* Complete list of devices */
# define le_type IdentityTag[0]
# define I2O_BSA 0x20
@@ -319,8 +355,12 @@ typedef struct Asr_softc {
target2lun_t * ha_targets[MAX_CHANNEL+1];
PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME ha_Msgs;
u_long ha_Msgs_Phys;
- u_int16_t ha_Msgs_Count;
+ u_int8_t ha_in_reset;
+# define HA_OPERATIONAL 0
+# define HA_IN_RESET 1
+# define HA_OFF_LINE 2
+# define HA_OFF_LINE_RECOVERY 3
/* Configuration information */
/* The target id maximums we take */
u_int8_t ha_MaxBus; /* Maximum bus */
@@ -329,7 +369,9 @@ typedef struct Asr_softc {
u_int8_t ha_SgSize; /* Max SG elements */
u_int8_t ha_pciBusNum;
u_int8_t ha_pciDeviceNum;
+ u_int8_t ha_adapter_target[MAX_CHANNEL+1];
u_int16_t ha_QueueSize; /* Max outstanding commands */
+ u_int16_t ha_Msgs_Count;
/* Links into other parents and HBAs */
struct Asr_softc * ha_next; /* HBA list */
@@ -439,11 +481,6 @@ STATIC INLINE int ASR_acquireHrt __P((
STATIC void asr_action __P((
IN struct cam_sim * sim,
IN union ccb * ccb));
-STATIC void asr_async __P((
- void * callback_arg,
- u_int32_t code,
- struct cam_path * path,
- void * arg));
STATIC void asr_poll __P((
IN struct cam_sim * sim));
@@ -639,6 +676,7 @@ ASR_getMessage(
STATIC U32
ASR_initiateCp (
INOUT i2oRegs_t * virt,
+ INOUT U8 * fvirt,
IN PI2O_MESSAGE_FRAME Message)
{
OUT U32 Mask = -1L;
@@ -655,7 +693,7 @@ ASR_initiateCp (
DELAY (10000);
}
if (MessageOffset != EMPTY_QUEUE) {
- bcopy (Message, virt->Address + MessageOffset,
+ bcopy (Message, fvirt + MessageOffset,
I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
/*
* Disable the Interrupts
@@ -671,7 +709,8 @@ ASR_initiateCp (
*/
STATIC U32
ASR_resetIOP (
- INOUT i2oRegs_t * virt)
+ INOUT i2oRegs_t * virt,
+ INOUT U8 * fvirt)
{
struct resetMessage {
I2O_EXEC_IOP_RESET_MESSAGE M;
@@ -698,7 +737,7 @@ ASR_resetIOP (
/*
* Send the Message out
*/
- if ((Old = ASR_initiateCp (virt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
+ if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
/*
* Wait for a response (Poll), timeouts are dangerous if
* the card is truly responsive. We assume response in 2s.
@@ -725,6 +764,7 @@ ASR_resetIOP (
STATIC INLINE PI2O_EXEC_STATUS_GET_REPLY
ASR_getStatus (
INOUT i2oRegs_t * virt,
+ INOUT U8 * fvirt,
OUT PI2O_EXEC_STATUS_GET_REPLY buffer)
{
defAlignLong(I2O_EXEC_STATUS_GET_MESSAGE,Message);
@@ -750,14 +790,14 @@ ASR_getStatus (
/*
* Send the Message out
*/
- if ((Old = ASR_initiateCp (virt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
+ if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
/*
* Wait for a response (Poll), timeouts are dangerous if
* the card is truly responsive. We assume response in 50ms.
*/
- u_int8_t Delay = 50;
+ u_int8_t Delay = 255;
- while (*((U8 * volatile)&buffer->SyncByte) == 0) {
+ while (*((U8 * volatile)&(buffer->SyncByte)) == 0) {
if (--Delay == 0) {
buffer = (PI2O_EXEC_STATUS_GET_REPLY)NULL;
break;
@@ -785,7 +825,7 @@ STATIC PROBE_RET
asr_probe(PROBE_ARGS)
{
PROBE_SET();
- if (id == 0xA5011044) {
+ if ((id == 0xA5011044) || (id == 0xA5111044)) {
PROBE_RETURN ("Adaptec Caching SCSI RAID");
}
PROBE_RETURN (NULL);
@@ -817,12 +857,38 @@ STATIC PROBE_RET
mode0_probe(PROBE_ARGS)
{
PROBE_SET();
+
+ /*
+ * If/When we can get a business case to commit to a
+ * Mode0 driver here, we can make all these tests more
+ * specific and robust. Mode0 adapters have their processors
+ * turned off, this the chips are in a raw state.
+ */
+
+ /* This is a PLX9054 */
+ if (id == 0x905410B5) {
+ PROBE_RETURN ("Adaptec Mode0 PM3757");
+ }
+ /* This is a PLX9080 */
if (id == 0x908010B5) {
- PROBE_RETURN ("Adaptec Mode0 3xxx");
+ PROBE_RETURN ("Adaptec Mode0 PM3754/PM3755");
+ }
+ /* This is a ZION 80303 */
+ if (id == 0x53098086) {
+ PROBE_RETURN ("Adaptec Mode0 3010S");
+ }
+ /* This is an i960RS */
+ if (id == 0x39628086) {
+ PROBE_RETURN ("Adaptec Mode0 2100S");
+ }
+ /* This is an i960RN */
+ if (id == 0x19648086) {
+ PROBE_RETURN ("Adaptec Mode0 PM2865/2400A/3200S/3400S");
}
-#if 0 /* this would match any generic i960 -- mjs */
+#if 0 /* this would match any generic i960 -- mjs */
+ /* This is an i960RP (typically also on Motherboards) */
if (id == 0x19608086) {
- PROBE_RETURN ("Adaptec Mode0 1xxx");
+ PROBE_RETURN ("Adaptec Mode0 PM2554/PM1554/PM2654");
}
#endif
PROBE_RETURN (NULL);
@@ -906,7 +972,7 @@ ASR_queue_s (
/*
* Wait for this board to report a finished instruction.
*/
- while (ccb->ccb_h.status == CAM_REQ_INPROG) {
+ while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
(void)asr_intr (sc);
}
@@ -947,9 +1013,9 @@ ASR_ccbAdd (
IN Asr_softc_t * sc,
INOUT union asr_ccb * ccb)
{
- int s;
+ int s;
- s = splcam();
+ s = splcam();
LIST_INSERT_HEAD(&(sc->ha_ccb), &(ccb->ccb_h), sim_links.le);
if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT) {
@@ -963,7 +1029,7 @@ ASR_ccbAdd (
ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
(ccb->ccb_h.timeout * hz) / 1000);
}
- splx(s);
+ splx(s);
} /* ASR_ccbAdd */
/*
@@ -974,12 +1040,12 @@ ASR_ccbRemove (
IN Asr_softc_t * sc,
INOUT union asr_ccb * ccb)
{
- int s;
+ int s;
- s = splcam();
+ s = splcam();
untimeout(asr_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch);
- LIST_REMOVE(&ccb->ccb_h, sim_links.le);
- splx(s);
+ LIST_REMOVE(&(ccb->ccb_h), sim_links.le);
+ splx(s);
} /* ASR_ccbRemove */
/*
@@ -991,9 +1057,12 @@ ASR_failActiveCommands (
IN Asr_softc_t * sc)
{
struct ccb_hdr * ccb;
+ int s;
+
+#if 0 /* Currently handled by callers, unnecessary paranoia currently */
+ /* Left in for historical perspective. */
defAlignLong(I2O_EXEC_LCT_NOTIFY_MESSAGE,Message);
PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr;
- int s;
/* Send a blind LCT command to wait for the enableSys to complete */
Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)ASR_fillMessage(Message,
@@ -1003,14 +1072,25 @@ ASR_failActiveCommands (
I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr,
I2O_CLASS_MATCH_ANYCLASS);
(void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
+#endif
- s = splcam();
- LIST_FOREACH(ccb, &(sc->ha_ccb), sim_links.le) {
-
+ s = splcam();
+ /*
+ * We do not need to inform the CAM layer that we had a bus
+ * reset since we manage it on our own, this also prevents the
+ * SCSI_DELAY settling that would be required on other systems.
+ * The `SCSI_DELAY' has already been handled by the card via the
+ * acquisition of the LCT table while we are at CAM priority level.
+ * for (int bus = 0; bus <= sc->ha_MaxBus; ++bus) {
+ * xpt_async (AC_BUS_RESET, sc->ha_path[bus], NULL);
+ * }
+ */
+ while ((ccb = LIST_FIRST(&(sc->ha_ccb))) != (struct ccb_hdr *)NULL) {
ASR_ccbRemove (sc, (union asr_ccb *)ccb);
ccb->status &= ~CAM_STATUS_MASK;
ccb->status |= CAM_REQUEUE_REQ;
+ /* Nothing Transfered */
((struct ccb_scsiio *)ccb)->resid
= ((struct ccb_scsiio *)ccb)->dxfer_len;
@@ -1020,7 +1100,7 @@ ASR_failActiveCommands (
wakeup ((caddr_t)ccb);
}
}
- splx(s);
+ splx(s);
} /* ASR_failActiveCommands */
/*
@@ -1311,7 +1391,7 @@ ASR_rescan(
bus = sc->ha_MaxBus;
/* Reset all existing cached TID lookups */
do {
- int target;
+ int target, event = 0;
/*
* Scan for all targets on this bus to see if they
@@ -1320,9 +1400,14 @@ ASR_rescan(
for (target = 0; target <= sc->ha_MaxId; ++target) {
int lun;
+ /* Stay away from the controller ID */
+ if (target == sc->ha_adapter_target[bus]) {
+ continue;
+ }
for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
PI2O_LCT_ENTRY Device;
tid_t TID = (tid_t)-1;
+ tid_t LastTID;
/*
* See if the cached TID changed. Search for
@@ -1348,8 +1433,46 @@ ASR_rescan(
* to be recalculated, or that the specific
* open device is no longer valid (Merde)
* because the cached TID changed.
- * ASR_getTid (sc, bus, target, lun) != TI
*/
+ LastTID = ASR_getTid (sc, bus, target, lun);
+ if (LastTID != TID) {
+ struct cam_path * path;
+
+ if (xpt_create_path(&path,
+ /*periph*/NULL,
+ cam_sim_path(sc->ha_sim[bus]),
+ target, lun) != CAM_REQ_CMP) {
+ if (TID == (tid_t)-1) {
+ event |= AC_LOST_DEVICE;
+ } else {
+ event |= AC_INQ_CHANGED
+ | AC_GETDEV_CHANGED;
+ }
+ } else {
+ if (TID == (tid_t)-1) {
+ xpt_async(
+ AC_LOST_DEVICE,
+ path, NULL);
+ } else if (LastTID == (tid_t)-1) {
+ struct ccb_getdev ccb;
+
+ xpt_setup_ccb(
+ &(ccb.ccb_h),
+ path, /*priority*/5);
+ xpt_async(
+ AC_FOUND_DEVICE,
+ path,
+ &ccb);
+ } else {
+ xpt_async(
+ AC_INQ_CHANGED,
+ path, NULL);
+ xpt_async(
+ AC_GETDEV_CHANGED,
+ path, NULL);
+ }
+ }
+ }
/*
* We have the option of clearing the
* cached TID for it to be rescanned, or to
@@ -1361,6 +1484,19 @@ ASR_rescan(
ASR_setTid (sc, bus, target, lun, TID);
}
}
+ /*
+ * The xpt layer can not handle multiple events at the
+ * same call.
+ */
+ if (event & AC_LOST_DEVICE) {
+ xpt_async(AC_LOST_DEVICE, sc->ha_path[bus], NULL);
+ }
+ if (event & AC_INQ_CHANGED) {
+ xpt_async(AC_INQ_CHANGED, sc->ha_path[bus], NULL);
+ }
+ if (event & AC_GETDEV_CHANGED) {
+ xpt_async(AC_GETDEV_CHANGED, sc->ha_path[bus], NULL);
+ }
} while (--bus >= 0);
return (error);
} /* ASR_rescan */
@@ -1376,14 +1512,69 @@ ASR_rescan(
/* Return : None */
/*-------------------------------------------------------------------------*/
-STATIC INLINE void
+STATIC INLINE int
ASR_reset(
IN Asr_softc_t * sc)
{
- (void)ASR_resetIOP (sc->ha_Virt);
- (void)ASR_init (sc);
- (void)ASR_rescan (sc);
- (void)ASR_failActiveCommands (sc);
+ int s, retVal;
+
+ s = splcam();
+ if ((sc->ha_in_reset == HA_IN_RESET)
+ || (sc->ha_in_reset == HA_OFF_LINE_RECOVERY)) {
+ splx (s);
+ return (EBUSY);
+ }
+ /*
+ * Promotes HA_OPERATIONAL to HA_IN_RESET,
+ * or HA_OFF_LINE to HA_OFF_LINE_RECOVERY.
+ */
+ ++(sc->ha_in_reset);
+ if (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0) {
+ debug_asr_printf ("ASR_resetIOP failed\n");
+ /*
+ * We really need to take this card off-line, easier said
+ * than make sense. Better to keep retrying for now since if a
+ * UART cable is connected the blinkLEDs the adapter is now in
+ * a hard state requiring action from the monitor commands to
+ * the HBA to continue. For debugging waiting forever is a
+ * good thing. In a production system, however, one may wish
+ * to instead take the card off-line ...
+ */
+# if 0 && (defined(HA_OFF_LINE))
+ /*
+ * Take adapter off-line.
+ */
+ printf ("asr%d: Taking adapter off-line\n",
+ sc->ha_path[0]
+ ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
+ : 0);
+ sc->ha_in_reset = HA_OFF_LINE;
+ splx (s);
+ return (ENXIO);
+# else
+ /* Wait Forever */
+ while (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0);
+# endif
+ }
+ retVal = ASR_init (sc);
+ splx (s);
+ if (retVal != 0) {
+ debug_asr_printf ("ASR_init failed\n");
+ sc->ha_in_reset = HA_OFF_LINE;
+ return (ENXIO);
+ }
+ if (ASR_rescan (sc) != 0) {
+ debug_asr_printf ("ASR_rescan failed\n");
+ }
+ ASR_failActiveCommands (sc);
+ if (sc->ha_in_reset == HA_OFF_LINE_RECOVERY) {
+ printf ("asr%d: Brining adapter back on-line\n",
+ sc->ha_path[0]
+ ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
+ : 0);
+ }
+ sc->ha_in_reset = HA_OPERATIONAL;
+ return (0);
} /* ASR_reset */
/*
@@ -1404,9 +1595,15 @@ asr_timeout(
* Check if the adapter has locked up?
*/
if ((s = ASR_getBlinkLedCode(sc)) != 0) {
- debug_asr_printf (
- " due to adapter blinkled code %x\nresetting adapter\n", s);
- ASR_reset (sc);
+ /* Reset Adapter */
+ printf ("asr%d: Blink LED 0x%x resetting adapter\n",
+ cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), s);
+ if (ASR_reset (sc) == ENXIO) {
+ /* Try again later */
+ ccb->ccb_h.timeout_ch = timeout(asr_timeout,
+ (caddr_t)ccb,
+ (ccb->ccb_h.timeout * hz) / 1000);
+ }
return;
}
/*
@@ -1415,9 +1612,14 @@ asr_timeout(
* our best bet, followed by a complete adapter reset if that fails.
*/
s = splcam();
- if (ccb->ccb_h.status == CAM_CMD_TIMEOUT) {
+ /* Check if we already timed out once to raise the issue */
+ if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_CMD_TIMEOUT) {
debug_asr_printf (" AGAIN\nreinitializing adapter\n");
- ASR_reset (sc);
+ if (ASR_reset (sc) == ENXIO) {
+ ccb->ccb_h.timeout_ch = timeout(asr_timeout,
+ (caddr_t)ccb,
+ (ccb->ccb_h.timeout * hz) / 1000);
+ }
splx(s);
return;
}
@@ -1428,6 +1630,7 @@ asr_timeout(
ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
(ccb->ccb_h.timeout * hz) / 1000);
ASR_resetBus (sc, cam_sim_bus(xpt_path_sim(ccb->ccb_h.path)));
+ xpt_async (AC_BUS_RESET, ccb->ccb_h.path, NULL);
splx(s);
} /* asr_timeout */
@@ -1445,19 +1648,10 @@ ASR_queue(
debug_asr_printf ("Host Command Dump:\n");
debug_asr_dump_message (Message);
- /*
- * Limit the number of Messages sent to this HBA. Better to sleep,
- * than to hardware loop like a nut! By limiting the number of
- * messages to an individual HBA here, we manage to perform all
- * the processing of the message ready to drop the next one into
- * the controller. We could limit the messages we are allowed to
- * take, but that may have a performance hit.
- */
ccb = (union asr_ccb *)(long)
I2O_MESSAGE_FRAME_getInitiatorContext64(Message);
- if (((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE)
- || ((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE)) {
+ if ((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE) {
#ifdef ASR_MEASURE_PERFORMANCE
int startTimeIndex;
@@ -1469,7 +1663,7 @@ ASR_queue(
sc->ha_timeQFreeHead,
sc->ha_timeQFreeTail);
if (-1 != startTimeIndex) {
- microtime(&sc->ha_timeQ[startTimeIndex]);
+ microtime(&(sc->ha_timeQ[startTimeIndex]));
}
/* Time stamp the command before we send it out */
((PRIVATE_SCSI_SCB_EXECUTE_MESSAGE *) Message)->
@@ -1484,7 +1678,7 @@ ASR_queue(
}
}
#endif
- bcopy (Message, sc->ha_Virt->Address + MessageOffset,
+ bcopy (Message, sc->ha_Fvirt + MessageOffset,
I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
if (ccb) {
ASR_ccbAdd (sc, ccb);
@@ -1493,7 +1687,11 @@ ASR_queue(
sc->ha_Virt->ToFIFO = MessageOffset;
} else {
if (ASR_getBlinkLedCode(sc)) {
- ASR_reset (sc);
+ /*
+ * Unlikely we can do anything if we can't grab a
+ * message frame :-(, but lets give it a try.
+ */
+ (void)ASR_reset (sc);
}
}
return (MessageOffset);
@@ -2035,7 +2233,7 @@ ASR_initOutBound (
/*
* Send the Message out
*/
- if ((Old = ASR_initiateCp (sc->ha_Virt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
+ if ((Old = ASR_initiateCp (sc->ha_Virt, sc->ha_Fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
u_long size, addr;
/*
@@ -2253,7 +2451,7 @@ ASR_sync (
* issuing a shutdown or an adapter reset).
*/
if ((sc != (Asr_softc_t *)NULL)
- && (LIST_FIRST(&sc->ha_ccb) != (struct ccb_hdr *)NULL)
+ && (LIST_FIRST(&(sc->ha_ccb)) != (struct ccb_hdr *)NULL)
&& ((TID = ASR_getTid (sc, bus, target, lun)) != (tid_t)-1)
&& (TID != (tid_t)0)) {
defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message);
@@ -2331,7 +2529,7 @@ asr_hbareset(
IN Asr_softc_t * sc)
{
ASR_synchronize (sc);
- ASR_reset (sc);
+ (void)ASR_reset (sc);
} /* asr_hbareset */
/*
@@ -2348,7 +2546,7 @@ asr_pci_map_mem (
IN Asr_softc_t * sc)
{
int rid;
- u_int32_t p, l;
+ u_int32_t p, l, s;
#if __FreeBSD_version >= 400000
/*
@@ -2356,7 +2554,7 @@ asr_pci_map_mem (
*/
for (rid = PCIR_MAPS;
rid < (PCIR_MAPS + 4 * sizeof(u_int32_t));
- ++rid) {
+ rid += sizeof(u_int32_t)) {
p = pci_read_config(tag, rid, sizeof(p));
if ((p & 1) == 0) {
break;
@@ -2375,6 +2573,23 @@ asr_pci_map_mem (
if (l > MAX_MAP) {
l = MAX_MAP;
}
+ /*
+ * The 2005S Zero Channel RAID solution is not a perfect PCI
+ * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
+ * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
+ * BAR0+2MB and sets it's size to 2MB. The IOP registers are
+ * accessible via BAR0, the messaging registers are accessible
+ * via BAR1. If the subdevice code is 50 to 59 decimal.
+ */
+ s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s));
+ if (s != 0xA5111044) {
+ s = pci_read_config(tag, PCIR_SUBVEND_0, sizeof(s));
+ if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
+ && (ADPTDOMINATOR_SUB_ID_START <= s)
+ && (s <= ADPTDOMINATOR_SUB_ID_END)) {
+ l = MAX_MAP; /* Conjoined BAR Raptor Daptor */
+ }
+ }
p &= ~15;
sc->ha_mem_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid,
p, p + l, l, RF_ACTIVE);
@@ -2386,6 +2601,31 @@ asr_pci_map_mem (
return (0);
}
sc->ha_Virt = (i2oRegs_t *) rman_get_virtual(sc->ha_mem_res);
+ if (s == 0xA5111044) { /* Split BAR Raptor Daptor */
+ if ((rid += sizeof(u_int32_t))
+ >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
+ return (0);
+ }
+ p = pci_read_config(tag, rid, sizeof(p));
+ pci_write_config(tag, rid, -1, sizeof(p));
+ l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15);
+ pci_write_config(tag, rid, p, sizeof(p));
+ if (l > MAX_MAP) {
+ l = MAX_MAP;
+ }
+ p &= ~15;
+ sc->ha_mes_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid,
+ p, p + l, l, RF_ACTIVE);
+ if (sc->ha_mes_res == (struct resource *)NULL) {
+ return (0);
+ }
+ if ((void *)rman_get_start(sc->ha_mes_res) == (void *)NULL) {
+ return (0);
+ }
+ sc->ha_Fvirt = (U8 *) rman_get_virtual(sc->ha_mes_res);
+ } else {
+ sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
+ }
#else
vm_size_t psize, poffs;
@@ -2394,7 +2634,7 @@ asr_pci_map_mem (
*/
for (rid = PCI_MAP_REG_START;
rid < (PCI_MAP_REG_START + 4 * sizeof(u_int32_t));
- ++rid) {
+ rid += sizeof(u_int32_t)) {
p = pci_conf_read (tag, rid);
if ((p & 1) == 0) {
break;
@@ -2438,6 +2678,23 @@ asr_pci_map_mem (
if (psize > MAX_MAP) {
psize = MAX_MAP;
}
+ /*
+ * The 2005S Zero Channel RAID solution is not a perfect PCI
+ * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
+ * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
+ * BAR0+2MB and sets it's size to 2MB. The IOP registers are
+ * accessible via BAR0, the messaging registers are accessible
+ * via BAR1. If the subdevice code is 50 to 59 decimal.
+ */
+ s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s));
+ if (s != 0xA5111044) {
+ s = pci_conf_read (tag, PCIR_SUBVEND_0)
+ if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
+ && (ADPTDOMINATOR_SUB_ID_START <= s)
+ && (s <= ADPTDOMINATOR_SUB_ID_END)) {
+ psize = MAX_MAP;
+ }
+ }
if ((sc->ha_Base == (void *)NULL)
|| (sc->ha_Base == (void *)PCI_MAP_MEMORY_ADDRESS_MASK)) {
@@ -2459,6 +2716,71 @@ asr_pci_map_mem (
}
sc->ha_Virt = (i2oRegs_t *)((u_long)sc->ha_Virt + poffs);
+ if (s == 0xA5111044) {
+ if ((rid += sizeof(u_int32_t))
+ >= (PCI_MAP_REG_START + 4 * sizeof(u_int32_t))) {
+ return (0);
+ }
+
+ /*
+ ** save old mapping, get size and type of memory
+ **
+ ** type is in the lowest four bits.
+ ** If device requires 2^n bytes, the next
+ ** n-4 bits are read as 0.
+ */
+
+ if ((((p = pci_conf_read (tag, rid))
+ & PCI_MAP_MEMORY_ADDRESS_MASK) == 0L)
+ || ((p & PCI_MAP_MEMORY_ADDRESS_MASK)
+ == PCI_MAP_MEMORY_ADDRESS_MASK)) {
+ debug_asr_printf ("asr_pci_map_mem: not configured by bios.\n");
+ }
+ pci_conf_write (tag, rid, 0xfffffffful);
+ l = pci_conf_read (tag, rid);
+ pci_conf_write (tag, rid, p);
+ p &= PCI_MAP_MEMORY_TYPE_MASK;
+
+ /*
+ ** check the type
+ */
+
+ if (!((l & PCI_MAP_MEMORY_TYPE_MASK)
+ == PCI_MAP_MEMORY_TYPE_32BIT_1M
+ && (p & ~0xfffff) == 0)
+ && ((l & PCI_MAP_MEMORY_TYPE_MASK)
+ != PCI_MAP_MEMORY_TYPE_32BIT)) {
+ debug_asr_printf (
+ "asr_pci_map_mem failed: bad memory type=0x%x\n",
+ (unsigned) l);
+ return (0);
+ };
+
+ /*
+ ** get the size.
+ */
+
+ psize = -(l & PCI_MAP_MEMORY_ADDRESS_MASK);
+ if (psize > MAX_MAP) {
+ psize = MAX_MAP;
+ }
+
+ /*
+ ** Truncate p to page boundary.
+ ** (Or does pmap_mapdev the job?)
+ */
+
+ poffs = p - trunc_page (p);
+ sc->ha_Fvirt = (U8 *)pmap_mapdev (p - poffs, psize + poffs);
+
+ if (sc->ha_Fvirt == (U8 *)NULL) {
+ return (0);
+ }
+
+ sc->ha_Fvirt = (U8 *)((u_long)sc->ha_Fvirt + poffs);
+ } else {
+ sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
+ }
#endif
return (1);
} /* asr_pci_map_mem */
@@ -2525,7 +2847,7 @@ asr_attach (ATTACH_ARGS)
/*
* Initialize the software structure
*/
- LIST_INIT(&sc->ha_ccb);
+ LIST_INIT(&(sc->ha_ccb));
# ifdef ASR_MEASURE_PERFORMANCE
{
u_int32_t i;
@@ -2590,11 +2912,11 @@ asr_attach (ATTACH_ARGS)
}
#endif
/* Check if the device is there? */
- if ((ASR_resetIOP(sc->ha_Virt) == 0)
+ if ((ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt) == 0)
|| ((status = (PI2O_EXEC_STATUS_GET_REPLY)malloc (
sizeof(I2O_EXEC_STATUS_GET_REPLY), M_TEMP, M_WAITOK))
== (PI2O_EXEC_STATUS_GET_REPLY)NULL)
- || (ASR_getStatus(sc->ha_Virt, status) == NULL)) {
+ || (ASR_getStatus(sc->ha_Virt, sc->ha_Fvirt, status) == NULL)) {
printf ("asr%d: could not initialize hardware\n", unit);
ATTACH_RETURN(ENODEV); /* Get next, maybe better luck */
}
@@ -2661,7 +2983,7 @@ asr_attach (ATTACH_ARGS)
I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO,
Buffer, sizeof(struct BufferInfo)))
!= (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)NULL) {
- sc->ha_blinkLED = sc->ha_Virt->Address
+ sc->ha_blinkLED = sc->ha_Fvirt
+ I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info)
+ FW_DEBUG_BLED_OFFSET;
}
@@ -2846,13 +3168,6 @@ asr_attach (ATTACH_ARGS)
sc->ha_sim[bus] = NULL;
continue;
}
- xpt_setup_ccb(&(ccb->ccb_h),
- sc->ha_path[bus], /*priority*/5);
- ccb->ccb_h.func_code = XPT_SASYNC_CB;
- ccb->csa.event_enable = AC_LOST_DEVICE;
- ccb->csa.callback = asr_async;
- ccb->csa.callback_arg = sc->ha_sim[bus];
- xpt_action((union ccb *)ccb);
}
asr_free_ccb (ccb);
}
@@ -2864,23 +3179,6 @@ asr_attach (ATTACH_ARGS)
ATTACH_RETURN(0);
} /* asr_attach */
-#if (!defined(UNREFERENCED_PARAMETER))
-# define UNREFERENCED_PARAMETER(x) (void)(x)
-#endif
-
-STATIC void
-asr_async(
- void * callback_arg,
- u_int32_t code,
- struct cam_path * path,
- void * arg)
-{
- UNREFERENCED_PARAMETER(callback_arg);
- UNREFERENCED_PARAMETER(code);
- UNREFERENCED_PARAMETER(path);
- UNREFERENCED_PARAMETER(arg);
-} /* asr_async */
-
STATIC void
asr_poll(
IN struct cam_sim *sim)
@@ -2913,7 +3211,22 @@ asr_action(
defAlignLong(struct Message,Message);
PI2O_MESSAGE_FRAME Message_Ptr;
- if (ccb->ccb_h.status != CAM_REQ_INPROG) {
+ /* Reject incoming commands while we are resetting the card */
+ if (sc->ha_in_reset != HA_OPERATIONAL) {
+ ccb->ccb_h.status &= ~CAM_STATUS_MASK;
+ if (sc->ha_in_reset >= HA_OFF_LINE) {
+ /* HBA is now off-line */
+ ccb->ccb_h.status |= CAM_UNREC_HBA_ERROR;
+ } else {
+ /* HBA currently resetting, try again later. */
+ ccb->ccb_h.status |= CAM_REQUEUE_REQ;
+ }
+ debug_asr_cmd_printf (" e\n");
+ xpt_done(ccb);
+ debug_asr_cmd_printf (" q\n");
+ break;
+ }
+ if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
printf(
"asr%d WARNING: scsi_cmd(%x) already done on b%dt%du%d\n",
cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
@@ -2988,7 +3301,7 @@ asr_action(
struct ccb_trans_settings *cts;
u_int target_mask;
- cts = &ccb->cts;
+ cts = &(ccb->cts);
target_mask = 0x01 << ccb->ccb_h.target_id;
if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB;
@@ -3015,7 +3328,7 @@ asr_action(
u_int32_t size_mb;
u_int32_t secs_per_cylinder;
- ccg = &ccb->ccg;
+ ccg = &(ccb->ccg);
size_mb = ccg->volume_size
/ ((1024L * 1024L) / ccg->block_size);
@@ -3053,7 +3366,7 @@ asr_action(
case XPT_PATH_INQ: /* Path routing inquiry */
{
- struct ccb_pathinq *cpi = &ccb->cpi;
+ struct ccb_pathinq *cpi = &(ccb->cpi);
cpi->version_num = 1; /* XXX??? */
cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
@@ -3106,7 +3419,7 @@ asr_IObySize(
if ( submitted_time != 0xffffffff ) {
timevaladd(
- &sc->ha_performance.read_by_size_total_time[index],
+ &(sc->ha_performance.read_by_size_total_time[index]),
&submitted_timeval);
if ( (min_submitR == 0)
|| (submitted_time < min_submitR) ) {
@@ -3121,7 +3434,7 @@ asr_IObySize(
++sc->ha_performance.write_by_size_count[index];
if ( submitted_time != 0xffffffff ) {
timevaladd(
- &sc->ha_performance.write_by_size_total_time[index],
+ &(sc->ha_performance.write_by_size_total_time[index]),
&submitted_timeval);
if ( (submitted_time < min_submitW)
|| (min_submitW == 0) ) {
@@ -3192,8 +3505,7 @@ asr_intr (
*/
Reply->StdReplyFrame.TransactionContext
= ((PI2O_SINGLE_REPLY_MESSAGE_FRAME)
- (sc->ha_Virt->Address + MessageOffset))
- ->TransactionContext;
+ (sc->ha_Fvirt + MessageOffset))->TransactionContext;
/*
* For 64 bit machines, we need to reconstruct the
* 64 bit context.
@@ -3221,7 +3533,7 @@ asr_intr (
* Copy the packet out to the Original Message
*/
bcopy ((caddr_t)Message_Ptr,
- sc->ha_Virt->Address + MessageOffset,
+ sc->ha_Fvirt + MessageOffset,
sizeof(I2O_UTIL_NOP_MESSAGE));
/*
* Issue the NOP
@@ -3542,6 +3854,9 @@ ASR_get_sc (
} /* ASR_get_sc */
STATIC u_int8_t ASR_ctlr_held;
+#if (!defined(UNREFERENCED_PARAMETER))
+# define UNREFERENCED_PARAMETER(x) (void)(x)
+#endif
STATIC int
asr_open(
@@ -3654,7 +3969,7 @@ ASR_queue_i(
case I2O_EXEC_IOP_RESET:
{ U32 status;
- status = ASR_resetIOP(sc->ha_Virt);
+ status = ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt);
ReplySizeInBytes = sizeof(status);
debug_usr_cmd_printf ("resetIOP done\n");
return (copyout ((caddr_t)&status, (caddr_t)Reply,
@@ -3664,7 +3979,7 @@ ASR_queue_i(
case I2O_EXEC_STATUS_GET:
{ I2O_EXEC_STATUS_GET_REPLY status;
- if (ASR_getStatus (sc->ha_Virt, &status)
+ if (ASR_getStatus (sc->ha_Virt, sc->ha_Fvirt, &status)
== (PI2O_EXEC_STATUS_GET_REPLY)NULL) {
debug_usr_cmd_printf ("getStatus failed\n");
return (ENXIO);
@@ -3766,7 +4081,8 @@ ASR_queue_i(
Message_Ptr) & 0xF0) >> 2)) {
free (Message_Ptr, M_TEMP);
I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
- &(Reply_Ptr->StdReplyFrame), (ASR_setSysTab(sc) != CAM_REQ_CMP));
+ &(Reply_Ptr->StdReplyFrame),
+ (ASR_setSysTab(sc) != CAM_REQ_CMP));
I2O_MESSAGE_FRAME_setMessageSize(
&(Reply_Ptr->StdReplyFrame.StdMessageFrame),
sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME));
@@ -3930,7 +4246,7 @@ ASR_queue_i(
if (error) {
while ((elm = SLIST_FIRST(&sgList))
!= (struct ioctlSgList_S *)NULL) {
- SLIST_REMOVE_HEAD(&sgList,link);
+ SLIST_REMOVE_HEAD(&sgList, link);
free (elm, M_TEMP);
}
free (Reply_Ptr, M_TEMP);
@@ -3947,7 +4263,7 @@ ASR_queue_i(
/* Free up in-kernel buffers */
while ((elm = SLIST_FIRST(&sgList))
!= (struct ioctlSgList_S *)NULL) {
- SLIST_REMOVE_HEAD(&sgList,link);
+ SLIST_REMOVE_HEAD(&sgList, link);
free (elm, M_TEMP);
}
free (Reply_Ptr, M_TEMP);
@@ -3970,20 +4286,21 @@ ASR_queue_i(
* Wait for the board to report a finished instruction.
*/
s = splcam();
- while (ccb->ccb_h.status == CAM_REQ_INPROG) {
+ while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
if (ASR_getBlinkLedCode(sc)) {
/* Reset Adapter */
printf ("asr%d: Blink LED 0x%x resetting adapter\n",
cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
ASR_getBlinkLedCode(sc));
- ASR_reset (sc);
+ if (ASR_reset (sc) == ENXIO) {
+ /* Command Cleanup */
+ ASR_ccbRemove(sc, ccb);
+ }
splx(s);
- /* Command Cleanup */
- ASR_ccbRemove(sc, ccb);
/* Free up in-kernel buffers */
while ((elm = SLIST_FIRST(&sgList))
!= (struct ioctlSgList_S *)NULL) {
- SLIST_REMOVE_HEAD(&sgList,link);
+ SLIST_REMOVE_HEAD(&sgList, link);
free (elm, M_TEMP);
}
free (Reply_Ptr, M_TEMP);
@@ -4000,7 +4317,8 @@ ASR_queue_i(
debug_usr_cmd_dump_message(Reply_Ptr);
I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
- &(Reply_Ptr->StdReplyFrame), (ccb->ccb_h.status != CAM_REQ_CMP));
+ &(Reply_Ptr->StdReplyFrame),
+ (ccb->ccb_h.status != CAM_REQ_CMP));
if (ReplySizeInBytes >= (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
- I2O_SCSI_SENSE_DATA_SZ - sizeof(U32))) {
@@ -4034,7 +4352,7 @@ ASR_queue_i(
elm->UserSpace,
I2O_FLAGS_COUNT_getCount(&(elm->FlagsCount)));
}
- SLIST_REMOVE_HEAD(&sgList,link);
+ SLIST_REMOVE_HEAD(&sgList, link);
free (elm, M_TEMP);
}
if (error == 0) {
@@ -4138,12 +4456,13 @@ asr_ioctl(
case DPT_SYSINFO & 0x0000FFFF:
case DPT_SYSINFO: {
sysInfo_S Info;
- caddr_t c_addr;
+ char * cp;
/* Kernel Specific ptok `hack' */
# define ptok(a) ((char *)(a) + KERNBASE)
bzero (&Info, sizeof(Info));
+ /* Appears I am the only person in the Kernel doing this */
outb (0x70, 0x12);
i = inb(0x71);
j = i >> 4;
@@ -4185,50 +4504,42 @@ asr_ioctl(
/* Info.osSubRevision = 0; */
Info.busType = SI_PCI_BUS;
Info.flags = SI_CMOS_Valid | SI_NumDrivesValid
- | SI_OSversionValid |SI_BusTypeValid;
+ | SI_OSversionValid | SI_BusTypeValid | SI_NO_SmartROM;
- /* Go Out And Look For SmartROM */
- for(i = 0; i < 3; ++i) {
- int k;
+ /* Go Out And Look For I2O SmartROM */
+ for(j = 0xC8000; j < 0xE0000; j += 2048) {
+ int k;
- if (i == 0) {
- j = 0xC8000;
- } else if (i == 1) {
- j = 0xD8000;
- } else {
- j = 0xDC000;
- }
- c_addr = ptok(j);
- if (*((unsigned short *)c_addr) != 0xAA55) {
+ cp = ptok(j);
+ if (*((unsigned short *)cp) != 0xAA55) {
continue;
}
- if (*((u_long *)(c_addr + 6)) != 0x202053) {
+ j += (cp[2] * 512) - 2048;
+ if ((*((u_long *)(cp + 6))
+ != ('S' + (' ' * 256) + (' ' * 65536L)))
+ || (*((u_long *)(cp + 10))
+ != ('I' + ('2' * 256) + ('0' * 65536L)))) {
continue;
}
- if (*((u_long *)(c_addr + 10)) != 0x545044) {
- continue;
- }
- c_addr += 0x24;
+ cp += 0x24;
for (k = 0; k < 64; ++k) {
- if ((*((unsigned char *)(c_addr++)) == ' ')
- && (*((unsigned char *)(c_addr)) == 'v')) {
+ if (*((unsigned short *)cp)
+ == (' ' + ('v' * 256))) {
break;
}
}
if (k < 64) {
Info.smartROMMajorVersion
- = *((unsigned char *)(c_addr += 3)) - '0';
+ = *((unsigned char *)(cp += 4)) - '0';
Info.smartROMMinorVersion
- = *((unsigned char *)(c_addr += 2));
+ = *((unsigned char *)(cp += 2));
Info.smartROMRevision
- = *((unsigned char *)(++c_addr));
+ = *((unsigned char *)(++cp));
Info.flags |= SI_SmartROMverValid;
+ Info.flags &= ~SI_NO_SmartROM;
break;
}
}
- if (i >= 3) {
- Info.flags |= SI_NO_SmartROM;
- }
/* Get The Conventional Memory Size From CMOS */
outb (0x70, 0x16);
j = inb (0x71);
@@ -4325,7 +4636,7 @@ asr_ioctl(
/* Get performance metrics */
#ifdef ASR_MEASURE_PERFORMANCE
case DPT_PERF_INFO:
- bcopy((caddr_t) &sc->ha_performance, data,
+ bcopy((caddr_t) &(sc->ha_performance), data,
sizeof(sc->ha_performance));
return (0);
#endif
@@ -4336,8 +4647,7 @@ asr_ioctl(
/* Reset and re-initialize the adapter */
case I2ORESETCMD:
- ASR_reset (sc);
- return (0);
+ return (ASR_reset (sc));
/* Rescan the LCT table and resynchronize the information */
case I2ORESCANCMD:
diff --git a/sys/dev/asr/dptsig.h b/sys/dev/asr/dptsig.h
index af6a404..01fca9e 100644
--- a/sys/dev/asr/dptsig.h
+++ b/sys/dev/asr/dptsig.h
@@ -1,9 +1,7 @@
/* $FreeBSD$ */
-/* BSDI dptsig.h,v 1.7 1998/06/03 19:15:00 karels Exp */
-
/*
* Copyright (c) 1996-2000 Distributed Processing Technology Corporation
- * Copyright (c) 2000 Adaptec Corporation.
+ * Copyright (c) 2000-2001 Adaptec Corporation.
* All rights reserved.
*
* Redistribution and use in source form, with or without modification, are
@@ -111,12 +109,14 @@ typedef unsigned long sigLONG;
#define PROC_486 0x08 /* Intel 80486 */
#define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */
#define PROC_SEXIUM 0x20 /* Intel 686 aka P6 aka Pentium Pro or MMX */
+#define PROC_ITANIUM 0x40 /* Intel Itanium 64 bit */
/* PROC_i960: */
#define PROC_960RX 0x01 /* Intel 80960RP/RD */
#define PROC_960HX 0x02 /* Intel 80960HA/HD/HT */
#define PROC_960RN 0x03 /* Intel 80960RN/RM */
#define PROC_960RS 0x04 /* Intel 80960RS */
+#define PROC_80303 0x05 /* Intel 80303 (ZION) */
/* PROC_MOTOROLA: */
#define PROC_68000 0x01 /* Motorola 68000 */
@@ -153,6 +153,7 @@ typedef unsigned long sigLONG;
#define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */
#define FT_RESOURCE 15 /* Storage Manager Resource File */
#define FT_MODEM_DB 16 /* Storage Manager Modem Database */
+#define FT_DMI 17 /* DMI component interface */
/* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */
/* ------------------------------------------------------------------ */
@@ -210,6 +211,7 @@ typedef unsigned long sigLONG;
#define OS_PLAN9 0x08000000 /* ATT Plan 9 */
#define OS_TSX 0x10000000 /* SNH TSX-32 */
#define OS_WINDOWS_98 0x20000000 /* Microsoft Windows '98 */
+#define OS_NW5x 0x40000000 /* Novell Netware 5x */
#define OS_OTHER 0x80000000 /* Other */
@@ -296,18 +298,26 @@ typedef unsigned long sigLONG;
/* Requirements - sigWORD dsFirmware; FLAG BITS */
/* ------------------------------------------------------------------ */
#define dsFirmware dsApplication
-#define FW_DNLDSIZE0 0x0000 /* 0..2 DownLoader Size - NONE */
-#define FW_DNLDSIZE16 0x0001 /* 0..2 DownLoader Size 16K */
-#define FW_DNLDSIZE32 0x0002 /* 0..2 DownLoader Size 32K */
-#define FW_DNLDSIZE64 0x0004 /* 0..2 DownLoader Size 64K */
+#define FW_DNLDSIZE16_OLD 0x0000 /* 0..3 DownLoader Size 16K - TO SUPPORT OLD IMAGES */
+#define FW_DNLDSIZE16k 0x0000 /* 0..3 DownLoader Size 16k */
+#define FW_DNLDSIZE16 0x0001 /* 0..3 DownLoader Size 16K */
+#define FW_DNLDSIZE32 0x0002 /* 0..3 DownLoader Size 32K */
+#define FW_DNLDSIZE64 0x0004 /* 0..3 DownLoader Size 64K */
+#define FW_DNLDSIZE0 0x000f /* 0..3 DownLoader Size 0K - NONE */
+#define FW_DNLDSIZE_NONE 0x000F /* 0..3 DownLoader Size - NONE */
+
+ /* Code Offset is position of the code within the ROM CODE Segment */
+#define FW_DNLDR_TOP 0x0000 /* 12 DownLoader Position (0=Top, 1=Bottom) */
+#define FW_DNLDR_BTM 0x1000 /* 12 DownLoader Position (0=Top, 1=Bottom) Dominator */
-#define FW_LOAD_BTM 0x2000 /* 13 Load Offset (1=Btm, 0=Top) */
-#define FW_LOAD_TOP 0x0000 /* 13 Load Offset (1=Btm, 0=Top) */
-#define FW_SIG_VERSION1 0x0000 /* 15..14 Version Bits 0=Ver1 */
+#define FW_LOAD_BTM 0x0000 /* 13 Code Offset (0=Btm, 1=Top) MIPS */
+#define FW_LOAD_TOP 0x2000 /* 13 Code Offset (0=Btm, 1=Top) i960 */
+
+#define FW_SIG_VERSION1 0x0000 /* 15..14 Version Bits 0=Ver1 */
+#define FW_SIG_VERSION2 0x4000 /* 15..14 Version Bits 1=Ver2 */
/*
- 0..2 Downloader Size (Value * 16K)
- 3
+ 0..3 Downloader Size (Value * 16K)
4
5
@@ -319,12 +329,55 @@ typedef unsigned long sigLONG;
10
11
- 12
- 13 Load Offset (1=BTM 0=TOP)
+ 12 Downloader Position (0=Top of Image 1= Bottom of Image (Dominator) )
+ 13 Load Offset (0=BTM (MIPS) -- 1=TOP (960) )
14..15 F/W Sig Version (0=Ver1)
*/
/* ------------------------------------------------------------------ */
+/* Sub System Vendor IDs - The PCI Sub system and vendor IDs for each */
+/* Adaptec Raid controller */
+/* ------------------------------------------------------------------ */
+#define PM1554U2_SUB_ID 0xC0011044
+#define PM1654U2_SUB_ID 0xC0021044
+#define PM1564U3_1_SUB_ID 0xC0031044
+#define PM1564U3_2_SUB_ID 0xC0041044
+#define PM1554U2_NOACPI_SUB_ID 0xC0051044
+#define PM2554U2_SUB_ID 0xC00A1044
+#define PM2654U2_SUB_ID 0xC00B1044
+#define PM2664U3_1_SUB_ID 0xC00C1044
+#define PM2664U3_2_SUB_ID 0xC00D1044
+#define PM2554U2_NOACPI_SUB_ID 0xC00E1044
+#define PM2654U2_NOACPI_SUB_ID 0xC00F1044
+#define PM3754U2_SUB_ID 0xC0141044
+#define PM3755U2B_SUB_ID 0xC0151044
+#define PM3755F_SUB_ID 0xC0161044
+#define PM3757U2_1_SUB_ID 0xC01E1044
+#define PM3757U2_2_SUB_ID 0xC01F1044
+#define PM3767U3_2_SUB_ID 0xC0201044
+#define PM3767U3_4_SUB_ID 0xC0211044
+#define PM2865U3_1_SUB_ID 0xC0281044
+#define PM2865U3_2_SUB_ID 0xC0291044
+#define PM2865F_SUB_ID 0xC02A1044
+#define ADPT2000S_1_SUB_ID 0xC03C1044
+#define ADPT2000S_2_SUB_ID 0xC03D1044
+#define ADPT2000F_SUB_ID 0xC03E1044
+#define ADPT3000S_1_SUB_ID 0xC0461044
+#define ADPT3000S_2_SUB_ID 0xC0471044
+#define ADPT3000F_SUB_ID 0xC0481044
+#define ADPT5000S_1_SUB_ID 0xC0501044
+#define ADPT5000S_2_SUB_ID 0xC0511044
+#define ADPT5000F_SUB_ID 0xC0521044
+#define ADPT1000UDMA_SUB_ID 0xC05A1044
+#define ADPT1000UDMA_DAC_SUB_ID 0xC05B1044
+#define ADPTI2O_DEVICE_ID 0xa501
+#define ADPTDOMINATOR_DEVICE_ID 0xa511
+#define ADPTDOMINATOR_SUB_ID_START 0xC0321044
+#define ADPTDOMINATOR_SUB_ID_END 0xC03b1044
+
+
+
+/* ------------------------------------------------------------------ */
/* ------------------------------------------------------------------ */
/* ------------------------------------------------------------------ */
diff --git a/sys/dev/asr/i2omsg.h b/sys/dev/asr/i2omsg.h
index bb28d62..f6e200d 100644
--- a/sys/dev/asr/i2omsg.h
+++ b/sys/dev/asr/i2omsg.h
@@ -3,16 +3,16 @@
* Copyright (c) 1996-2000 Distributed Processing Technology Corporation
* Copyright (c) 2000 Adaptec Corporation.
* All rights reserved.
- *
+ *
* Copyright 1999 I2O Special Interest Group (I2O SIG). All rights reserved.
* All rights reserved
- *
+ *
* TERMS AND CONDITIONS OF USE
- *
+ *
* Redistribution and use in source form, with or without modification, are
* permitted provided that redistributions of source code must retain the
* above copyright notice, this list of conditions and the following disclaimer.
- *
+ *
* This software is provided `as is' by Distributed Processing Technology and
* any express or implied warranties, including, but not limited to, the
* implied warranties of merchantability and fitness for a particular purpose,
@@ -24,7 +24,7 @@
* contract, strict liability, or tort (including negligence or otherwise)
* arising in any way out of the use of this driver software, even if advised
* of the possibility of such damage.
- *
+ *
* This header file, and any modifications of this header file, are provided
* contingent upon your agreement and adherence to the here-listed terms and
* conditions. By accepting and/or using this header file, you agree to abide
@@ -33,45 +33,45 @@
* without reference to conflict-of-law provisions. If you do not agree
* to these terms and conditions, please delete this file, and any copies,
* permanently, without making any use thereof.
- *
+ *
* THIS HEADER FILE IS PROVIDED FREE OF CHARGE ON AN AS-IS BASIS WITHOUT
* WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
* TO IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE. I2O SIG DOES NOT WARRANT THAT THIS HEADER FILE WILL MEET THE
* USER'S REQUIREMENTS OR THAT ITS OPERATION WILL BE UNINTERRUPTED OR
* ERROR-FREE.
- *
+ *
* I2O SIG DISCLAIMS ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF
* ANY PROPRIETARY RIGHTS, RELATING TO THE IMPLEMENTATION OF THE I2O
* SPECIFICATIONS. I2O SIG DOES NOT WARRANT OR REPRESENT THAT SUCH
* IMPLEMENTATIONS WILL NOT INFRINGE SUCH RIGHTS.
- *
+ *
* THE USER OF THIS HEADER FILE SHALL HAVE NO RECOURSE TO I2O SIG FOR ANY
* ACTUAL OR CONSEQUENTIAL DAMAGES INCLUDING, BUT NOT LIMITED TO, LOST DATA
* OR LOST PROFITS ARISING OUT OF THE USE OR INABILITY TO USE THIS PROGRAM.
- *
+ *
* I2O SIG grants the user of this header file a license to copy, distribute,
* and modify it, for any purpose, under the following terms. Any copying,
* distribution, or modification of this header file must not delete or alter
* the copyright notice of I2O SIG or any of these Terms and Conditions.
- *
+ *
* Any distribution of this header file must not include a charge for the
* header file (unless such charges are strictly for the physical acts of
* copying or transferring copies). However, distribution of a product in
* which this header file is embedded may include a charge so long as any
* such charge does not include any charge for the header file itself.
- *
+ *
* Any modification of this header file constitutes a derivative work based
* on this header file. Any distribution of such derivative work: (1) must
* include prominent notices that the header file has been changed from the
- * original, together with the dates of any changes; (2) automatically includes
+ * original, together with the dates of any changes; (2) automatically includes
* this same license to the original header file from I2O SIG, without any
* restriction thereon from the distributing user; and (3) must include a
* grant of license of the modified file under the same terms and conditions
* as these Terms and Conditions.
- *
+ *
* The I2O SIG Web site can be found at: http://www.i2osig.org
- *
+ *
* The I2O SIG encourages you to deposit derivative works based on this
* header file at the I2O SIG Web site. Furthermore, to become a Registered
* Developer of the I2O SIG, sign up at the Web site or call 415.750.8352
@@ -430,16 +430,7 @@ typedef struct _I2O_FAILURE_REPLY_MESSAGE_FRAME {
BF reserved1:12;
# endif
U32 AgeLimit;
-/* i2odep.h looks after this, but for portability sake ... */
-#if (!defined(__FAR__))
-# if (defined(__BORLANDC__))
-# define __FAR__ far
-# else
-# define __FAR__
-# endif
-#endif
-/* Not really `far, but it is a *long* physical pointer reference */
- I2O_MESSAGE_FRAME __FAR__ * PreservedMFA;
+ U32 PreservedMFA;
} I2O_FAILURE_REPLY_MESSAGE_FRAME, *PI2O_FAILURE_REPLY_MESSAGE_FRAME;
/* I2O Transport Message Reply for Transaction Error. */
diff --git a/sys/dev/asr/osd_defs.h b/sys/dev/asr/osd_defs.h
index 8959134..9103c73 100644
--- a/sys/dev/asr/osd_defs.h
+++ b/sys/dev/asr/osd_defs.h
@@ -1,5 +1,4 @@
/* $FreeBSD$ */
-/* BSDI osd_defs.h,v 1.4 1998/06/03 19:14:58 karels Exp */
/*
* Copyright (c) 1996-1999 Distributed Processing Technology Corporation
* All rights reserved.
@@ -58,6 +57,7 @@
#elif (defined(__bsdi__))
# define _DPT_BSDI
#elif (defined(__FreeBSD__))
+# undef _DPT_FREE_BSD
# define _DPT_FREE_BSD
#else
# define _DPT_SCO
diff --git a/sys/dev/asr/osd_unix.h b/sys/dev/asr/osd_unix.h
index d283aff..ad74580 100644
--- a/sys/dev/asr/osd_unix.h
+++ b/sys/dev/asr/osd_unix.h
@@ -1,6 +1,4 @@
/* $FreeBSD$ */
-/* BSDI osd_unix.h,v 1.7 1998/06/03 19:14:58 karels Exp */
-
/*
* Copyright (c) 1996-1999 Distributed Processing Technology Corporation
* All rights reserved.
diff --git a/sys/dev/asr/osd_util.h b/sys/dev/asr/osd_util.h
index fb232c7..150ba1f 100644
--- a/sys/dev/asr/osd_util.h
+++ b/sys/dev/asr/osd_util.h
@@ -1,6 +1,4 @@
/* $FreeBSD$ */
-/* BSDI osd_util.h,v 1.8 1998/06/03 19:14:58 karels Exp */
-
/*
* Copyright (c) 1996-1999 Distributed Processing Technology Corporation
* All rights reserved.
diff --git a/sys/dev/asr/sys_info.h b/sys/dev/asr/sys_info.h
index 41fba37..24a5eca 100644
--- a/sys/dev/asr/sys_info.h
+++ b/sys/dev/asr/sys_info.h
@@ -1,6 +1,4 @@
/* $FreeBSD$ */
-/* BSDI sys_info.h,v 1.6 1998/06/03 19:14:59 karels Exp */
-
/*
* Copyright (c) 1996-1999 Distributed Processing Technology Corporation
* All rights reserved.
OpenPOWER on IntegriCloud