diff options
author | jhb <jhb@FreeBSD.org> | 2009-11-24 16:57:35 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2009-11-24 16:57:35 +0000 |
commit | c0320571458261fb0e2ea728e41b96476f7b791a (patch) | |
tree | c567d02cee6ae3276b5d54ed860ef9d6ebccbfea /sys/dev/an/if_an.c | |
parent | 12cc74363af56825a0d1dbbb25123f05a4ed8f3f (diff) | |
download | FreeBSD-src-c0320571458261fb0e2ea728e41b96476f7b791a.zip FreeBSD-src-c0320571458261fb0e2ea728e41b96476f7b791a.tar.gz |
- For 350 chips, don't set various INTR bits in TX control word; turning INTR
bits on seems to confuse hardware TX engine.
- For 350 chips, set TX desc's buffer physical address before turning on the
TX desc valid bit.
Submitted by: Jeremy O'Brien obrien654j | gmail, sephe
Obtained from: DragonFly BSD
Diffstat (limited to 'sys/dev/an/if_an.c')
-rw-r--r-- | sys/dev/an/if_an.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/dev/an/if_an.c b/sys/dev/an/if_an.c index c05b59c..6d9ef96 100644 --- a/sys/dev/an/if_an.c +++ b/sys/dev/an/if_an.c @@ -2800,7 +2800,7 @@ an_start_locked(struct ifnet *ifp) tx_frame_802_3.an_tx_802_3_payload_len, (caddr_t)&sc->an_txbuf); - txcontrol = AN_TXCTL_8023; + txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350); /* write the txcontrol only */ an_write_data(sc, id, 0x08, (caddr_t)&txcontrol, sizeof(txcontrol)); @@ -2863,7 +2863,7 @@ an_start_locked(struct ifnet *ifp) tx_frame_802_3.an_tx_802_3_payload_len, (caddr_t)&sc->an_txbuf); - txcontrol = AN_TXCTL_8023; + txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350); /* write the txcontrol only */ bcopy((caddr_t)&txcontrol, &buf[0x08], sizeof(txcontrol)); @@ -2885,7 +2885,7 @@ an_start_locked(struct ifnet *ifp) tx_frame_802_3.an_tx_802_3_payload_len; an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr; - for (i = 0; i < sizeof(an_tx_desc) / 4 ; i++) { + for (i = sizeof(an_tx_desc) / 4 - 1; i >= 0; i--) { CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET /* zero for now */ + (0 * sizeof(an_tx_desc)) |