diff options
| author | scottl <scottl@FreeBSD.org> | 2003-09-25 23:36:41 +0000 |
|---|---|---|
| committer | scottl <scottl@FreeBSD.org> | 2003-09-25 23:36:41 +0000 |
| commit | 8dab67f1baa6bf33290dc8f014e4db76df4fa73e (patch) | |
| tree | f385e4b92f2137741fc1114364b1ce09207536ef /sys/dev/aic7xxx | |
| parent | 46474cb3419778b89c94d8782cf5a7d15794c7fe (diff) | |
| download | FreeBSD-src-8dab67f1baa6bf33290dc8f014e4db76df4fa73e.zip FreeBSD-src-8dab67f1baa6bf33290dc8f014e4db76df4fa73e.tar.gz | |
aic79xx_pci.c:
aic7xxx_pci.c:
When performing our register test, be careful
to avoid resetting the chip when pausing the
controller. The test reads the HCNTRL register
and then writes it back with the PAUSE bit
explicitly set. If the last write to the controller
before our probe is to reset it, the CHIPRST
bit will still be set, so we must mask it off
before the PAUSE operation. On some chip versions,
we cannot access registers for a few 100us after
a reset, so this inadvertant reset was causing PCI
errors to occur on the read to check for paused
status.
Submitted by: gibbs
Diffstat (limited to 'sys/dev/aic7xxx')
| -rw-r--r-- | sys/dev/aic7xxx/aic79xx_pci.c | 6 | ||||
| -rw-r--r-- | sys/dev/aic7xxx/aic7xxx_pci.c | 6 |
2 files changed, 8 insertions, 4 deletions
diff --git a/sys/dev/aic7xxx/aic79xx_pci.c b/sys/dev/aic7xxx/aic79xx_pci.c index 1996cc7..0523ed6 100644 --- a/sys/dev/aic7xxx/aic79xx_pci.c +++ b/sys/dev/aic7xxx/aic79xx_pci.c @@ -38,7 +38,7 @@ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGES. * - * $Id: //depot/aic7xxx/aic7xxx/aic79xx_pci.c#76 $ + * $Id: //depot/aic7xxx/aic7xxx/aic79xx_pci.c#80 $ */ #include <sys/cdefs.h> @@ -453,8 +453,10 @@ ahd_pci_test_register_access(struct ahd_softc *ahd) * or read prefetching could be initiated by the * CPU or host bridge. Our device does not support * either, so look for data corruption and/or flaged - * PCI errors. + * PCI errors. First pause without causing another + * chip reset. */ + hcntrl &= ~CHIPRST; ahd_outb(ahd, HCNTRL, hcntrl|PAUSE); while (ahd_is_paused(ahd) == 0) ; diff --git a/sys/dev/aic7xxx/aic7xxx_pci.c b/sys/dev/aic7xxx/aic7xxx_pci.c index 9e1e81e..49ba1f2 100644 --- a/sys/dev/aic7xxx/aic7xxx_pci.c +++ b/sys/dev/aic7xxx/aic7xxx_pci.c @@ -39,7 +39,7 @@ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGES. * - * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_pci.c#69 $ + * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_pci.c#72 $ */ #include <sys/cdefs.h> @@ -1285,8 +1285,10 @@ ahc_pci_test_register_access(struct ahc_softc *ahc) * or read prefetching could be initiated by the * CPU or host bridge. Our device does not support * either, so look for data corruption and/or flagged - * PCI errors. + * PCI errors. First pause without causing another + * chip reset. */ + hcntrl &= ~CHIPRST; ahc_outb(ahc, HCNTRL, hcntrl|PAUSE); while (ahc_is_paused(ahc) == 0) ; |
