Upgrade to version 1.1 of the aic79xx U320 driver.

aic79xx.c:
	o Remove redundant ahd_update_modes() call.
	o Correct panic in diagnostic should state corruption cause
	  the SCB Id to be invalid during a selection timeout.
	o Add workaround for missing BUSFREEREV feature in Rev A silicon.
	o Corect formatting nits.
	o Use register pretty printing in more places.
	o Save and restore our SCB pointer when updating the waiting queue
	  list for an "expected" LQ-out busfree.
	o In ahd_clear_intstat, deal with the missing autoclear in the
	  CLRLQO* registers.
	o BE fixup in a diagnostic printf.
	o Make sure that we are in the proper mode before disabling
	  selections in ahd_update_pending_scbs.
	o Add more diagnostics.
	o task_attribute_nonpkt_tag -> task_attribute: we don't need a
	  nonpkt_tag field anymore for allowing all 512 SCBs to be
	  used in non-packetized connections.
	o Negotiate HOLD_MCS to U320 devices.
	o Add a few additional mode assertions.
	o Restore the chip mode after clearing out the qinfifo so that
	  code using ahd_abort_scbs sees a consistent mode.
	o Simplify the DMA engine shutdown routine prior to performing
	  a bus reset.
	o Perform the sequencer restart after a chip reset prior to
	  setting up our timer to poll for the reset to be complete.
	  On some OSes, the timer could actually pre-empt us and order
	  is important here.
	o Have our "reset poller" set the expected mode since there is
	  no guarantee of what mode will be in force when we are called
	  from the OS timer.
	o Save and restore the SCB pointer in ahd_dump_card_state().  This
	  routine must not modify card state.
	o Ditto for ahd_dump_scbs().

aic79xx.h:
	o Add a few more chip bug definitions.
	o Align our tag on a 32bit boundary.

aic79xx.reg:
aic79xx.seq:
	o Start work on removing workarounds for Rev B.
	o Use a special location in scratch from for stroring
	  our SCBPTR during legacy FIFO allocations.  This corrects
	  problems in mixed packetized/non-packetized configurations
	  where calling into a FIFO task corrupted our SCBPTR.
	o Don't rely on DMA priority to guarantee that all data in
	  our FIFOs will flush prior to a command completion notification
	  going out of the command channel.  We've never seen this assumption
	  fail, but better safe than sorry.
	o Deal with missing BUSFREEREV feature in H2A.
	o Simplify disconnect list code now that the list will always
	  have only a single entry.
	o Implement the AHD_REG_SLOW_SETTLE_BUG workaround.
	o Swith to using "REG_ISR" for local mode scratch during
	  our ISR.
	o Add a missing jmp to the data_group_dma_loop after our
	  data pointers have been re-initialized by the kernel.
	o Correct test in the bitbucket code so that we actually
	  wait for the bitbucket to complete before signaling the
	  kernel of the overrun condition.
	o Reposition pkt_saveptrs to avoid a jmp instruction.
	o Update a comment to reflect that the code now waits for
	  a FIFO to drain prior to issuing a CLRCHN.

aic79xx_inline.h:
	o Remove unused untagged queue handling code.
	o Don't attempt to htole64 what could be a 32bit value.

aic79xx_pci.c:
	o Set additional bug flags for rev A chips.

1 files changed, 4 insertions, 2 deletions

diff --git a/sys/dev/aic7xxx/aic79xx_pci.c b/sys/dev/aic7xxx/aic79xx_pci.c
index fe7e12b..c165ce2 100644
--- a/sys/dev/aic7xxx/aic79xx_pci.c
+++ b/sys/dev/aic7xxx/aic79xx_pci.c
@@ -38,7 +38,7 @@
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGES.
  *
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx_pci.c#41 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx_pci.c#44 $
  *
  * $FreeBSD$
  */
@@ -791,7 +791,9 @@ ahd_aic7902_setup(struct ahd_softc *ahd)
 			  |  AHD_LQO_ATNO_BUG|AHD_AUTOFLUSH_BUG
 			  |  AHD_CLRLQO_AUTOCLR_BUG|AHD_PCIX_MMAPIO_BUG
 			  |  AHD_PCIX_CHIPRST_BUG|AHD_PKTIZED_STATUS_BUG
-			  |  AHD_PKT_LUN_BUG;
+			  |  AHD_PKT_LUN_BUG|AHD_MDFF_WSCBPTR_BUG
+			  |  AHD_REG_SLOW_SETTLE_BUG|AHD_SET_MODE_BUG
+			  |  AHD_BUSFREEREV_BUG;
 	}
 
 	ahd->channel = ahd_get_pci_function(pci) + 'A';