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| author | ian <ian@FreeBSD.org> | 2015-10-18 18:26:19 +0000 |
|---|---|---|
| committer | ian <ian@FreeBSD.org> | 2015-10-18 18:26:19 +0000 |
| commit | 8a5f64069af62a6675dc9ba61325d2a112ad869c (patch) | |
| tree | 9d37d8568c7526eb1b62ec1eeae4588221837a89 /sys/conf | |
| parent | 93afe7bdc606349a681a0e5518afa7640d4ee4d6 (diff) | |
| download | FreeBSD-src-8a5f64069af62a6675dc9ba61325d2a112ad869c.zip FreeBSD-src-8a5f64069af62a6675dc9ba61325d2a112ad869c.tar.gz | |
Import ARM_INTRNG, the "next generation" interrupt architecture for arm
and armv6 architecures. The primary enhancement over the old design is
support for hierarchical interrupt controllers (such as a gpio driver
which can receive interrupts from a root PIC and act as a PIC itself for
clients interested in handling a change of gpio pin state as an
interrupt). The new code also provides an infrastructure for mapping
interrupts described in metadata in the form of a "controller reference
plus interrupt number" tuple into the simple "0-n" flat numeric space
understood by rman and the bus resource mechanisms.
Use of the new code is enabled by setting the ARM_INTRNG option, and by
making a few simple changes to the platform's support code. In addition
each existing PIC driver needs changes to be ready for INTRNG; this commit
contains the changes for the arm/gic driver, which most armv6 SoCs use, but
it does not enable the new code yet on any platform.
This project has been many years in the making, starting as a GSoC project
by Jakub Klama (jceel@) in 2012. That didn't get committed right away and
the source base evolved out from under it to some degree. In 2014 I rebased
the diffs to then -current and did some enhancements in the area of mapping
interrupt numbers and storing associated fdt data, then the project went
cold again for a while. Eventually Svata Kraus took that work in progress
and did another big round of work on it, removing most of the remaining
rough edges. Finally I took that and made one more pass through it, mostly
disabling the "INTR_SOLO" feature for now, pending further design
discussions on how to most efficiently dispatch a pending interrupt through
more than one layer of PIC. The current code with the INTR_SOLO feature
disabled uses approximate 100 extra cpu cycles for each cascaded PIC the
interrupt has to be passed to, so what's left to do is about efficiency, not
correct operation.
Differential Revision: https://reviews.freebsd.org/D2047
Diffstat (limited to 'sys/conf')
| -rw-r--r-- | sys/conf/files.arm | 4 | ||||
| -rw-r--r-- | sys/conf/options.arm | 1 |
2 files changed, 4 insertions, 1 deletions
diff --git a/sys/conf/files.arm b/sys/conf/files.arm index a2abcc2..33838ae 100644 --- a/sys/conf/files.arm +++ b/sys/conf/files.arm @@ -41,7 +41,8 @@ arm/arm/gic.c optional gic arm/arm/identcpu.c standard arm/arm/in_cksum.c optional inet | inet6 arm/arm/in_cksum_arm.S optional inet | inet6 -arm/arm/intr.c standard +arm/arm/intr.c optional !arm_intrng +arm/arm/intrng.c optional arm_intrng arm/arm/locore.S standard no-obj arm/arm/machdep.c standard arm/arm/mem.c optional mem @@ -49,6 +50,7 @@ arm/arm/minidump_machdep.c optional mem arm/arm/mp_machdep.c optional smp arm/arm/nexus.c standard arm/arm/physmem.c standard +arm/arm/pic_if.m optional arm_intrng arm/arm/pl190.c optional pl190 arm/arm/pl310.c optional pl310 arm/arm/platform.c optional platform diff --git a/sys/conf/options.arm b/sys/conf/options.arm index 57cef6a..aee546a 100644 --- a/sys/conf/options.arm +++ b/sys/conf/options.arm @@ -1,6 +1,7 @@ #$FreeBSD$ ARMV6 opt_global.h ARM_CACHE_LOCK_ENABLE opt_global.h +ARM_INTRNG opt_global.h ARM_KERN_DIRECTMAP opt_vm.h ARM_L2_PIPT opt_global.h ARM_MANY_BOARD opt_global.h |
