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author | zbb <zbb@FreeBSD.org> | 2017-06-21 18:28:37 +0000 |
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committer | Luiz Souza <luiz@netgate.com> | 2017-09-06 11:58:50 -0500 |
commit | 44752463c3400fe2157d7366aa321251eb00cb93 (patch) | |
tree | 5ae811206b4e7190a6e26b4f9de443e61ad785c0 /sys/boot | |
parent | 55babd738f9c97efeeaf27a471a836ddf050a88f (diff) | |
download | FreeBSD-src-44752463c3400fe2157d7366aa321251eb00cb93.zip FreeBSD-src-44752463c3400fe2157d7366aa321251eb00cb93.tar.gz |
Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms
This patch disables outer cache sync in PL310 driver
by adding "arm,io-coherent" property. In addition to
the previous patches it was the last bit needed
for enabling proper operation of Armada 38x SoCs
with the IO cache coherency.
Submitted by: Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: mmel
Differential revision: https://reviews.freebsd.org/D11204
(cherry picked from commit 4bb8c5f36b6f41e820675d3a4d940cb802da42a3)
Diffstat (limited to 'sys/boot')
-rw-r--r-- | sys/boot/fdt/dts/arm/armada-38x.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/boot/fdt/dts/arm/armada-38x.dtsi b/sys/boot/fdt/dts/arm/armada-38x.dtsi index bcbf8be..d1b5625 100644 --- a/sys/boot/fdt/dts/arm/armada-38x.dtsi +++ b/sys/boot/fdt/dts/arm/armada-38x.dtsi @@ -177,6 +177,7 @@ reg = <0x8000 0x1000>; cache-unified; cache-level = <2>; + arm,io-coherent; }; scu@c000 { |