Add FDT for Arndale board and Samsung Exynos5250 SoC.

Submitted by:	Ruslan Bukin <br@bsdpad.com>

2 files changed, 202 insertions, 0 deletions

diff --git a/sys/boot/fdt/dts/exynos5250-arndale.dts b/sys/boot/fdt/dts/exynos5250-arndale.dts
new file mode 100644
index 0000000..67cadcb
--- /dev/null
+++ b/sys/boot/fdt/dts/exynos5250-arndale.dts
@@ -0,0 +1,45 @@
+/*-
+ * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+
+/include/ "exynos5250.dtsi"
+
+/ {
+	model = "Arndale Board";
+
+	memory {
+		device_type = "memory";
+		reg = < 0x40000000 0x80000000 >;  /* 2G */
+	};
+
+	chosen {
+		stdin = &serial2;
+		stdout = &serial2;
+	};
+};
diff --git a/sys/boot/fdt/dts/exynos5250.dtsi b/sys/boot/fdt/dts/exynos5250.dtsi
new file mode 100644
index 0000000..860fcd0
--- /dev/null
+++ b/sys/boot/fdt/dts/exynos5250.dtsi
@@ -0,0 +1,157 @@
+/*-
+ * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/ {
+	compatible = "samsung,exynos5250";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&GIC>;
+
+	Exynos5@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges;
+		bus-frequency = <0>;
+
+		GIC: interrupt-controller@10481000 {
+			compatible = "arm,gic";
+			reg =	< 0x10481000 0x1000 >,	/* Distributor Registers */
+				< 0x10482000 0x2000 >;	/* CPU Interface Registers */
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+
+		mct {
+			compatible = "exynos,mct";
+			reg = < 0x101C0000 0x1000 >;
+			clock-frequency = <24000000>;
+		};
+
+		generic_timer {
+			compatible = "arm,armv7-timer";
+			clock-frequency = <24000000>;
+		};
+
+		pwm {
+			compatible = "samsung,s3c24x0-timer";
+			reg = <0x12DD0000 0x1000>;
+			interrupts = < 71 >;
+			interrupt-parent = <&GIC>;
+			clock-frequency = <24000000>;
+		};
+
+		usb@12110000 {
+			compatible = "exynos,usb-ehci", "usb-ehci";
+			reg = <0x12110000 0x1000>, /* EHCI */
+			      <0x12130000 0x1000>, /* EHCI host ctrl */
+			      <0x10040000 0x1000>, /* Power */
+			      <0x10050000 0x1000>, /* Sysreg */
+			      <0x11400000 0x1000>; /* GPIO left */
+			interrupts = < 103 >;
+			interrupt-parent = <&GIC>;
+		};
+
+		usb@12120000 {
+			compatible = "exynos,usb-ohci", "usb-ohci";
+			reg = <0x12120000 0x10000>;
+			interrupts = < 103 >;
+			interrupt-parent = <&GIC>;
+		};
+
+		sdhci@12200000 {
+			compatible = "sdhci_generic";
+			reg = <0x12200000 0x1000>;
+			interrupts = <107>;
+			interrupt-parent = <&GIC>;
+			clock-frequency = <24000000>; /* TODO: verify freq */
+		};
+
+		sdhci@12210000 {
+			compatible = "sdhci_generic";
+			reg = <0x12210000 0x1000>;
+			interrupts = <108>;
+			interrupt-parent = <&GIC>;
+			clock-frequency = <24000000>;
+		};
+
+		sdhci@12220000 {
+			compatible = "sdhci_generic";
+			reg = <0x12220000 0x1000>;
+			interrupts = <109>;
+			interrupt-parent = <&GIC>;
+			clock-frequency = <24000000>;
+		};
+
+		sdhci@12230000 {
+			compatible = "sdhci_generic";
+			reg = <0x12230000 0x1000>;
+			interrupts = <110>;
+			interrupt-parent = <&GIC>;
+			clock-frequency = <24000000>;
+		};
+
+		serial0: serial@12C00000 {
+			compatible = "exynos";
+			reg = <0x12C00000 0x100>;
+			interrupts = < 83 >;
+			interrupt-parent = <&GIC>;
+			clock-frequency = < 100000000 >;
+			current-speed = <115200>;
+		};
+
+		serial1: serial@12C10000 {
+			compatible = "exynos";
+			reg = <0x12C10000 0x100>;
+			interrupts = < 84 >;
+			interrupt-parent = <&GIC>;
+			clock-frequency = < 100000000 >;
+			current-speed = <115200>;
+		};
+
+		serial2: serial@12C20000 {
+			compatible = "exynos";
+			reg = <0x12C20000 0x100>;
+			interrupts = < 85 >;
+			interrupt-parent = <&GIC>;
+			clock-frequency = < 100000000 >;
+			current-speed = <115200>;
+		};
+
+		serial3: serial@12C30000 {
+			compatible = "exynos";
+			reg = <0x12C30000 0x100>;
+			interrupts = < 86 >;
+			interrupt-parent = <&GIC>;
+			clock-frequency = < 100000000 >;
+			current-speed = <115200>;
+		};
+
+	};
+};