MFC 263250, 263251, 263424, 263425, 263426, 263427, 263430, 263431

  Use the same cache terminology as the ARM docs in comments. No
  functional changes.

  Use armv7 TLB flush code, not arm11, for cortex-a processors.

  Exynos/ Arndale...
  - Disable debugging by default.
  - Add display-related and clk devices to the tree
  - Prevent resources intersection with EHCI driver
  - Add display-related and clk devices to the tree
  - Prevent resources intersection with EHCI driver
  - Add driver for Display Controller.
  - Add support for Samsung Chromebook (ARM Cortex A15 machine).
  - Rename mct and ehci drivers files to match common naming.

2 files changed, 92 insertions, 3 deletions

diff --git a/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts b/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts
new file mode 100644
index 0000000..0b9c978
--- /dev/null
+++ b/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts
@@ -0,0 +1,59 @@
+/*-
+ * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+
+/include/ "exynos5250.dtsi"
+
+/ {
+	model = "Samsung Chromebook";
+
+	memory {
+		device_type = "memory";
+		reg = < 0x40000000 0x80000000 >;  /* 2G */
+	};
+
+	SOC: Exynos5@0 {
+
+		fimd0: fimd@14400000 {
+			status = "okay";
+
+			panel-size = < 1366 768 >;
+			panel-hsync = < 80 32 48 >;
+			panel-vsync = < 14 5 3 >;
+			panel-clk-div = < 17 >;
+			panel-backlight-pin = < 25 >;
+		};
+
+	};
+
+	chosen {
+		stdin = &serial2;
+		stdout = &serial2;
+	};
+};
diff --git a/sys/boot/fdt/dts/arm/exynos5250.dtsi b/sys/boot/fdt/dts/arm/exynos5250.dtsi
index 860fcd0..f679a13 100644
--- a/sys/boot/fdt/dts/arm/exynos5250.dtsi
+++ b/sys/boot/fdt/dts/arm/exynos5250.dtsi
@@ -32,7 +32,16 @@
 	#size-cells = <1>;
 	interrupt-parent = <&GIC>;
 
-	Exynos5@0 {
+	aliases {
+		soc = &SOC;
+		serial0 = &serial0;
+		serial1 = &serial1;
+		clk0 = &clk0;
+		dp0 = &dp0;
+		fimd0 = &fimd0;
+	};
+
+	SOC: Exynos5@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";
@@ -48,6 +57,11 @@
 			#interrupt-cells = <1>;
 		};
 
+		clk0: clk@10010000 {
+			compatible = "exynos,clk";
+			reg = < 0x10020000 0x20000 >;
+		};
+
 		mct {
 			compatible = "exynos,mct";
 			reg = < 0x101C0000 0x1000 >;
@@ -72,8 +86,8 @@
 			reg = <0x12110000 0x1000>, /* EHCI */
 			      <0x12130000 0x1000>, /* EHCI host ctrl */
 			      <0x10040000 0x1000>, /* Power */
-			      <0x10050000 0x1000>, /* Sysreg */
-			      <0x11400000 0x1000>; /* GPIO left */
+			      <0x10050230 0x10>, /* Sysreg */
+			      <0x11400C60 0x10>; /* GPIO left */
 			interrupts = < 103 >;
 			interrupt-parent = <&GIC>;
 		};
@@ -153,5 +167,21 @@
 			current-speed = <115200>;
 		};
 
+		fimd0: fimd@14400000 {
+			compatible = "exynos,fimd";
+			status = "disabled";
+			reg = < 0x14400000 0x10000 >, /* fimd */
+			      < 0x14420000 0x10000 >, /* disp */
+			      < 0x10050000 0x220 >; /* sysreg */
+			interrupt-parent = <&GIC>;
+		};
+
+		dp0: dp@145B0000 {
+			compatible = "exynos,dp";
+			status = "disabled";
+			reg = < 0x145B0000 0x10000 >,
+			      < 0x10040720 0x10 >; /* PHY */
+			interrupt-parent = <&GIC>;
+		};
 	};
 };