Add AHCI attachment code for Allwinner A10/A20 SoCs.

The Allwinner SoC has an AHCI device on its internal main bus rather
than the PCI bus.  This SoC is somewhat underdocumented, and its SATA
controller is no exception.  The methods to support this chip were
harvested from the Linux Allwinner SDK, and then constants invented to
describe what's going on based on low-level constants contained in the
SATA standard and guess work.

This SoC requires a specific AHCI channel setup in order to start the
operations on the channel properly.

Clock setup and AHCI channel setup idea came from NetBSD.

Tested on Cubieboard 2 and Banana pi (and attachment on Cubieboard by
Pratik Singhal).

Differential Revision:	https://reviews.freebsd.org/D737
Submitted by:	imp
Reviewed by:	imp, ganbold, mav, andrew

3 files changed, 7 insertions, 1 deletions

diff --git a/sys/boot/fdt/dts/arm/cubieboard.dts b/sys/boot/fdt/dts/arm/cubieboard.dts
index d9a7c15..c9f83c1 100644
--- a/sys/boot/fdt/dts/arm/cubieboard.dts
+++ b/sys/boot/fdt/dts/arm/cubieboard.dts
@@ -64,6 +64,10 @@
 		emac@01c0b000 {
 			status = "okay";
 		};
+
+		ahci: sata@01c18000 {
+			status = "okay";
+		};
 	};
 
 	chosen {
diff --git a/sys/boot/fdt/dts/arm/sun4i-a10.dtsi b/sys/boot/fdt/dts/arm/sun4i-a10.dtsi
index 0d554f2..03e2883 100644
--- a/sys/boot/fdt/dts/arm/sun4i-a10.dtsi
+++ b/sys/boot/fdt/dts/arm/sun4i-a10.dtsi
@@ -112,10 +112,11 @@
 		};
 
 		sata@01c18000 {
-			compatible = "allwinner,sun4i-ahci";
+			compatible = "allwinner,sun4i-a10-ahci";
 			reg = <0x01c18000 0x1000>;
 			interrupts = <56>;
 			interrupt-parent = <&AINTC>;
+			status = "disabled";
 		};
 
 		UART0: serial@01c28000 {
diff --git a/sys/boot/fdt/dts/arm/sun7i-a20.dtsi b/sys/boot/fdt/dts/arm/sun7i-a20.dtsi
index fa60c38..dfaa00e 100644
--- a/sys/boot/fdt/dts/arm/sun7i-a20.dtsi
+++ b/sys/boot/fdt/dts/arm/sun7i-a20.dtsi
@@ -122,6 +122,7 @@
 			reg = <0x01c18000 0x1000>;
 			interrupts = <56>;
 			interrupt-parent = <&GIC>;
+			status = "disabled";
 		};
 
 		UART0: serial@01c28000 {