diff options
| author | marius <marius@FreeBSD.org> | 2010-05-02 19:38:17 +0000 |
|---|---|---|
| committer | marius <marius@FreeBSD.org> | 2010-05-02 19:38:17 +0000 |
| commit | 630328c1b513925136fa49a9af3f323f4a7d53c9 (patch) | |
| tree | b933ba8d8d44204848615024c83b80501df01e6d /sys/boot/sparc64 | |
| parent | 071496a9c757550fc1834fc2cbdd8d6d142ca23b (diff) | |
| download | FreeBSD-src-630328c1b513925136fa49a9af3f323f4a7d53c9.zip FreeBSD-src-630328c1b513925136fa49a9af3f323f4a7d53c9.tar.gz | |
Add support for SPARC64 V (and where it already makes sense for other
HAL/Fujitsu) CPUs. For the most part this consists of fleshing out the
MMU and cache handling, it doesn't add pmap optimizations possible with
these CPU, yet, though.
With these changes FreeBSD runs stable on Fujitsu Siemens PRIMEPOWER 250
and likely also other models based on SPARC64 V like 450, 650 and 850.
Thanks go to Michael Moll for providing access to a PRIMEPOWER 250.
Diffstat (limited to 'sys/boot/sparc64')
| -rw-r--r-- | sys/boot/sparc64/loader/main.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/sys/boot/sparc64/loader/main.c b/sys/boot/sparc64/loader/main.c index 2afbfee..b3e7908 100644 --- a/sys/boot/sparc64/loader/main.c +++ b/sys/boot/sparc64/loader/main.c @@ -451,7 +451,8 @@ dtlb_va_to_pa_sun4u(vm_offset_t va) reg = dtlb_get_data_sun4u(i); wrpr(pstate, pstate, 0); reg >>= TD_PA_SHIFT; - if (cpu_impl >= CPU_IMPL_ULTRASPARCIII) + if (cpu_impl == CPU_IMPL_SPARC64V || + cpu_impl >= CPU_IMPL_ULTRASPARCIII) return (reg & TD_PA_CH_MASK); return (reg & TD_PA_SF_MASK); } @@ -474,7 +475,8 @@ itlb_va_to_pa_sun4u(vm_offset_t va) reg = itlb_get_data_sun4u(i); wrpr(pstate, pstate, 0); reg >>= TD_PA_SHIFT; - if (cpu_impl >= CPU_IMPL_ULTRASPARCIII) + if (cpu_impl == CPU_IMPL_SPARC64V || + cpu_impl >= CPU_IMPL_ULTRASPARCIII) return (reg & TD_PA_CH_MASK); return (reg & TD_PA_SF_MASK); } @@ -696,6 +698,7 @@ cpu_cpuid_prop_sun4u(void) switch (cpu_impl) { case CPU_IMPL_SPARC64: + case CPU_IMPL_SPARC64V: case CPU_IMPL_ULTRASPARCI: case CPU_IMPL_ULTRASPARCII: case CPU_IMPL_ULTRASPARCIIi: @@ -720,6 +723,7 @@ cpu_get_mid_sun4u(void) switch (cpu_impl) { case CPU_IMPL_SPARC64: + case CPU_IMPL_SPARC64V: case CPU_IMPL_ULTRASPARCI: case CPU_IMPL_ULTRASPARCII: case CPU_IMPL_ULTRASPARCIIi: |
