diff options
author | eadler <eadler@FreeBSD.org> | 2014-02-04 03:36:42 +0000 |
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committer | eadler <eadler@FreeBSD.org> | 2014-02-04 03:36:42 +0000 |
commit | ec294fd7f5fc5de11ed889d6c2d701f918d1ecfb (patch) | |
tree | 7e76e370b9406b0383b17bd343084addb4ad6a25 /sys/boot/i386 | |
parent | d374d7f398b846dc59d8a5ec3c7bfb318cf880af (diff) | |
download | FreeBSD-src-ec294fd7f5fc5de11ed889d6c2d701f918d1ecfb.zip FreeBSD-src-ec294fd7f5fc5de11ed889d6c2d701f918d1ecfb.tar.gz |
MFC r258779,r258780,r258787,r258822:
Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit. Instead use (1U << 31) which gets the
expected result.
Similar to the (1 << 31) case it is not defined to do (2 << 30).
This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.
A similar change was made in OpenBSD.
Diffstat (limited to 'sys/boot/i386')
-rw-r--r-- | sys/boot/i386/libfirewire/fwohci.h | 4 | ||||
-rw-r--r-- | sys/boot/i386/libfirewire/fwohcireg.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/sys/boot/i386/libfirewire/fwohci.h b/sys/boot/i386/libfirewire/fwohci.h index fc20043..4a93220 100644 --- a/sys/boot/i386/libfirewire/fwohci.h +++ b/sys/boot/i386/libfirewire/fwohci.h @@ -76,7 +76,7 @@ void fwohci_poll(struct fwohci_softc *); #define OHCI_CROMHDR 0x18 #define OHCI_BUS_ID 0x1c #define OHCI_BUS_OPT 0x20 -#define OHCI_BUSIRMC (1 << 31) +#define OHCI_BUSIRMC (1U << 31) #define OHCI_BUSCMC (1 << 30) #define OHCI_BUSISC (1 << 29) #define OHCI_BUSBMC (1 << 28) @@ -102,7 +102,7 @@ void fwohci_poll(struct fwohci_softc *); #define OHCI_SID_BUF 0x64 #define OHCI_SID_CNT 0x68 -#define OHCI_SID_ERR (1 << 31) +#define OHCI_SID_ERR (1U << 31) #define OHCI_SID_CNT_MASK 0xffc #define OHCI_IT_STAT 0x90 diff --git a/sys/boot/i386/libfirewire/fwohcireg.h b/sys/boot/i386/libfirewire/fwohcireg.h index 27786e8..d24f658 100644 --- a/sys/boot/i386/libfirewire/fwohcireg.h +++ b/sys/boot/i386/libfirewire/fwohcireg.h @@ -239,7 +239,7 @@ struct ohci_registers { fwohcireg_t dummy1[3]; /* dummy 0x44-0x4c */ fwohcireg_t hcc_cntl_set; /* HCC control set 0x50 */ fwohcireg_t hcc_cntl_clr; /* HCC control clr 0x54 */ -#define OHCI_HCC_BIBIV (1 << 31) /* BIBimage Valid */ +#define OHCI_HCC_BIBIV (1U << 31) /* BIBimage Valid */ #define OHCI_HCC_BIGEND (1 << 30) /* noByteSwapData */ #define OHCI_HCC_PRPHY (1 << 23) /* programPhyEnable */ #define OHCI_HCC_PHYEN (1 << 22) /* aPhyEnhanceEnable */ @@ -278,7 +278,7 @@ struct ohci_registers { fwohcireg_t link_cntl_clr; /* Chip control clear 0xe4*/ #define FWOHCI_NODEID 0xe8 fwohcireg_t node; /* Node ID 0xe8 */ -#define OHCI_NODE_VALID (1 << 31) +#define OHCI_NODE_VALID (1U << 31) #define OHCI_NODE_ROOT (1 << 30) #define OHCI_ASYSRCBUS 1 |