diff options
author | zbb <zbb@FreeBSD.org> | 2016-06-02 18:35:35 +0000 |
---|---|---|
committer | zbb <zbb@FreeBSD.org> | 2016-06-02 18:35:35 +0000 |
commit | f1fe5e60a7c3b37eccc78de804780b24fbc4eaf7 (patch) | |
tree | 7ea78528888e5dc822174fe1ce786c5fec7ae346 /sys/boot/fdt | |
parent | b408dead16d7c05d7bccafd522bb42c5358195ac (diff) | |
download | FreeBSD-src-f1fe5e60a7c3b37eccc78de804780b24fbc4eaf7.zip FreeBSD-src-f1fe5e60a7c3b37eccc78de804780b24fbc4eaf7.tar.gz |
Split CESA memory resource into TDMA and CESA regs
TDMA and CESA registers are placed in different ranges of memory. Split
memory resource in DTS to reflect that. This change is needed to support
multiple CESA nodes as otherwise the ranges of different nodes would
overlap.
In consequence, CESA_WRITE and CESA_READ macros have been split depending
on which range of registers is accessed. Offsets for CESA registers have
been modified as the base address has changed.
Submitted by: Michal Stanek <mst@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D6217
Diffstat (limited to 'sys/boot/fdt')
-rw-r--r-- | sys/boot/fdt/dts/arm/db78100.dts | 3 | ||||
-rw-r--r-- | sys/boot/fdt/dts/arm/db88f6281.dts | 3 | ||||
-rw-r--r-- | sys/boot/fdt/dts/arm/dockstar.dts | 3 | ||||
-rw-r--r-- | sys/boot/fdt/dts/arm/dreamplug-1001.dts | 3 | ||||
-rw-r--r-- | sys/boot/fdt/dts/arm/dreamplug-1001N.dts | 3 | ||||
-rw-r--r-- | sys/boot/fdt/dts/arm/sheevaplug.dts | 3 |
6 files changed, 12 insertions, 6 deletions
diff --git a/sys/boot/fdt/dts/arm/db78100.dts b/sys/boot/fdt/dts/arm/db78100.dts index 8a9e91c..d890db0 100644 --- a/sys/boot/fdt/dts/arm/db78100.dts +++ b/sys/boot/fdt/dts/arm/db78100.dts @@ -283,7 +283,8 @@ crypto@90000 { compatible = "mrvl,cesa"; - reg = <0x90000 0x10000>; + reg = <0x90000 0x1000 /* tdma base reg chan 0 */ + 0x9D000 0x1000>; /* cesa base reg chan 0 */ interrupts = <19>; interrupt-parent = <&PIC>; }; diff --git a/sys/boot/fdt/dts/arm/db88f6281.dts b/sys/boot/fdt/dts/arm/db88f6281.dts index 55a27fc..f50eb65 100644 --- a/sys/boot/fdt/dts/arm/db88f6281.dts +++ b/sys/boot/fdt/dts/arm/db88f6281.dts @@ -221,7 +221,8 @@ crypto@30000 { compatible = "mrvl,cesa"; - reg = <0x30000 0x10000>; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ interrupts = <22>; interrupt-parent = <&PIC>; diff --git a/sys/boot/fdt/dts/arm/dockstar.dts b/sys/boot/fdt/dts/arm/dockstar.dts index 595894a..b805342 100644 --- a/sys/boot/fdt/dts/arm/dockstar.dts +++ b/sys/boot/fdt/dts/arm/dockstar.dts @@ -206,7 +206,8 @@ crypto@30000 { compatible = "mrvl,cesa"; - reg = <0x30000 0x10000>; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ interrupts = <22>; interrupt-parent = <&PIC>; diff --git a/sys/boot/fdt/dts/arm/dreamplug-1001.dts b/sys/boot/fdt/dts/arm/dreamplug-1001.dts index 92ca1b0..7b3998d 100644 --- a/sys/boot/fdt/dts/arm/dreamplug-1001.dts +++ b/sys/boot/fdt/dts/arm/dreamplug-1001.dts @@ -270,7 +270,8 @@ crypto@30000 { compatible = "mrvl,cesa"; - reg = <0x30000 0x10000>; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ interrupts = <22>; interrupt-parent = <&PIC>; diff --git a/sys/boot/fdt/dts/arm/dreamplug-1001N.dts b/sys/boot/fdt/dts/arm/dreamplug-1001N.dts index 230a65f..d233bca 100644 --- a/sys/boot/fdt/dts/arm/dreamplug-1001N.dts +++ b/sys/boot/fdt/dts/arm/dreamplug-1001N.dts @@ -291,7 +291,8 @@ crypto@30000 { compatible = "mrvl,cesa"; - reg = <0x30000 0x10000>; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ interrupts = <22>; interrupt-parent = <&PIC>; diff --git a/sys/boot/fdt/dts/arm/sheevaplug.dts b/sys/boot/fdt/dts/arm/sheevaplug.dts index 3d347da..fb0270a 100644 --- a/sys/boot/fdt/dts/arm/sheevaplug.dts +++ b/sys/boot/fdt/dts/arm/sheevaplug.dts @@ -218,7 +218,8 @@ crypto@30000 { compatible = "mrvl,cesa"; - reg = <0x30000 0x10000>; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ interrupts = <22>; interrupt-parent = <&PIC>; |