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author | imp <imp@FreeBSD.org> | 2006-12-20 18:18:24 +0000 |
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committer | imp <imp@FreeBSD.org> | 2006-12-20 18:18:24 +0000 |
commit | d08a8bf72b1ca12bc84007b1b5c5f9dd2c18e5fe (patch) | |
tree | 03f5f0727ab6833a28f69f324f7a2007f4c336af /sys/boot/arm | |
parent | a75cd7f9db8d0f44fd2f367bb2b4de68d1519b8a (diff) | |
download | FreeBSD-src-d08a8bf72b1ca12bc84007b1b5c5f9dd2c18e5fe.zip FreeBSD-src-d08a8bf72b1ca12bc84007b1b5c5f9dd2c18e5fe.tar.gz |
MFp4: bwct memory size and PLL parameters
Diffstat (limited to 'sys/boot/arm')
-rw-r--r-- | sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h b/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h index c6810f0..13edbec 100644 --- a/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h +++ b/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h @@ -39,6 +39,14 @@ typedef unsigned short sdram_size_t; #define OSC_MAIN_MULT 90 #endif +#ifdef BOOT_BWCT +/* The following divisor sets PLLA frequency: e.g. 16/4 * 45 = 180MHz */ +#define OSC_MAIN_FREQ_DIV 4 /* for 16MHz osc */ +#define SDRAM_WIDTH AT91C_SDRC_DBW_32_BITS +typedef unsigned int sdram_size_t; +#define OSC_MAIN_MULT 45 +#endif + #ifdef BOOT_TSC /* The following divisor sets PLLA frequency: e.g. 16/4 * 45 = 180MHz */ #define OSC_MAIN_FREQ_DIV 4 /* for 16MHz osc */ |