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authorimp <imp@FreeBSD.org>2006-04-21 07:29:14 +0000
committerimp <imp@FreeBSD.org>2006-04-21 07:29:14 +0000
commit633fda1144fcfaa94b04ccd80c9fd1e1cd4cda6d (patch)
treee297ae6dba87d5e05472daac1ca4c160cc3b7fa7 /sys/boot/arm/at91
parentef3a255b546714bf122bb5bdb3477abfd7f4c828 (diff)
downloadFreeBSD-src-633fda1144fcfaa94b04ccd80c9fd1e1cd4cda6d.zip
FreeBSD-src-633fda1144fcfaa94b04ccd80c9fd1e1cd4cda6d.tar.gz
MFp4:
On the KB9202 go ahead and enable the flash controller so the boot loader can access the parallel flash.
Diffstat (limited to 'sys/boot/arm/at91')
-rw-r--r--sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c b/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c
index cd10d25..9e196d5 100644
--- a/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c
+++ b/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c
@@ -93,6 +93,18 @@ _init(void)
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY))
continue;
+#ifdef BOOT_KB9202
+ // setup flash access (allow ample margin)
+ // 9 wait states, 1 setup, 1 hold, 1 float for 8-bit device
+ ((AT91PS_SMC2)AT91C_BASE_SMC2)->SMC2_CSR[0] =
+ AT91C_SMC2_WSEN |
+ (9 & AT91C_SMC2_NWS) |
+ ((1 << 8) & AT91C_SMC2_TDF) |
+ AT91C_SMC2_DBW_8 |
+ ((1 << 24) & AT91C_SMC2_RWSETUP) |
+ ((1 << 29) & AT91C_SMC2_RWHOLD);
+#endif
+
// setup SDRAM access
// EBI chip-select register (CS1 = SDRAM controller)
// 9 col, 13row, 4 bank, CAS2
@@ -160,7 +172,7 @@ _init(void)
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD;
pUSART->US_IDR = (unsigned int) -1;
pUSART->US_CR =
- AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS;
+ AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS;
pUSART->US_BRGR = ((((AT91C_MASTER_CLOCK*10)/(BAUD*16))+5)/10);
pUSART->US_TTGR = 0;
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
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