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authorloos <loos@FreeBSD.org>2015-05-13 01:48:47 +0000
committerloos <loos@FreeBSD.org>2015-05-13 01:48:47 +0000
commite5dea16a768045c5ecd051198a22e5f74cdc8b14 (patch)
treec12caeabb924901ee76584a3fc0dba6a19fe3775 /sys/arm
parent249a98951b343bc0f7ab1435547b88fb76fb3dcb (diff)
downloadFreeBSD-src-e5dea16a768045c5ecd051198a22e5f74cdc8b14.zip
FreeBSD-src-e5dea16a768045c5ecd051198a22e5f74cdc8b14.tar.gz
Fix the SMP initialization on RPi 2 (BCM2836).
Invalidate the CPU cache before start the others CPUs. Submitted by: Michal Meloun <meloun@miracle.cz>
Diffstat (limited to 'sys/arm')
-rw-r--r--sys/arm/broadcom/bcm2835/bcm2836_mp.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/sys/arm/broadcom/bcm2835/bcm2836_mp.c b/sys/arm/broadcom/bcm2835/bcm2836_mp.c
index 177f41e..717f242 100644
--- a/sys/arm/broadcom/bcm2835/bcm2836_mp.c
+++ b/sys/arm/broadcom/bcm2835/bcm2836_mp.c
@@ -123,6 +123,8 @@ platform_mp_start_ap(void)
BSWR4(MBOX3CLR_CORE(i), 0xffffffff);
}
wmb();
+ cpu_idcache_wbinv_all();
+ cpu_l2cache_wbinv_all();
/* boot secondary CPUs */
for (i = 1; i < mp_ncpus; i++) {
@@ -152,9 +154,6 @@ platform_mp_start_ap(void)
/* recode AP in CPU map */
CPU_SET(i, &all_cpus);
}
-
- cpu_idcache_wbinv_all();
- cpu_l2cache_wbinv_all();
}
void
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