summaryrefslogtreecommitdiffstats
path: root/sys/arm
diff options
context:
space:
mode:
authormav <mav@FreeBSD.org>2013-02-28 13:46:03 +0000
committermav <mav@FreeBSD.org>2013-02-28 13:46:03 +0000
commit6cf7cc6e4d8da1cf9aba1c481b914e4ca5e9f38f (patch)
treec8556591f85961643a9b4ddfaaa7c1008bb03d81 /sys/arm
parent240074414d4919ebd889f27087c72783a7ed9b19 (diff)
downloadFreeBSD-src-6cf7cc6e4d8da1cf9aba1c481b914e4ca5e9f38f.zip
FreeBSD-src-6cf7cc6e4d8da1cf9aba1c481b914e4ca5e9f38f.tar.gz
MFcalloutng:
Switch eventtimers(9) from using struct bintime to sbintime_t. Even before this not a single driver really supported full dynamic range of struct bintime even in theory, not speaking about practical inexpediency. This change legitimates the status quo and cleans up the code.
Diffstat (limited to 'sys/arm')
-rw-r--r--sys/arm/allwinner/timer.c35
-rw-r--r--sys/arm/arm/mpcore_timer.c30
-rw-r--r--sys/arm/broadcom/bcm2835/bcm2835_systimer.c19
-rw-r--r--sys/arm/lpc/lpc_timer.c32
-rw-r--r--sys/arm/mv/timer.c31
-rw-r--r--sys/arm/ti/am335x/am335x_dmtimer.c28
-rw-r--r--sys/arm/versatile/sp804.c19
7 files changed, 68 insertions, 126 deletions
diff --git a/sys/arm/allwinner/timer.c b/sys/arm/allwinner/timer.c
index 4da3517..49c5f18 100644
--- a/sys/arm/allwinner/timer.c
+++ b/sys/arm/allwinner/timer.c
@@ -95,7 +95,7 @@ int a10_timer_get_timerfreq(struct a10_timer_softc *);
static u_int a10_timer_get_timecount(struct timecounter *);
static int a10_timer_timer_start(struct eventtimer *,
- struct bintime *, struct bintime *);
+ sbintime_t first, sbintime_t period);
static int a10_timer_timer_stop(struct eventtimer *);
static uint64_t timer_read_counter64(void);
@@ -193,12 +193,8 @@ a10_timer_attach(device_t dev)
sc->et.et_name = "a10_timer Eventtimer";
sc->et.et_flags = ET_FLAGS_ONESHOT | ET_FLAGS_PERIODIC;
sc->et.et_quality = 1000;
- sc->et.et_min_period.sec = 0;
- sc->et.et_min_period.frac =
- ((0x00000005LLU << 32) / sc->et.et_frequency) << 32;
- sc->et.et_max_period.sec = 0xfffffff0U / sc->et.et_frequency;
- sc->et.et_max_period.frac =
- ((0xfffffffeLLU << 32) / sc->et.et_frequency) << 32;
+ sc->et.et_min_period = (0x00000005LLU << 32) / sc->et.et_frequency;
+ sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
sc->et.et_start = a10_timer_timer_start;
sc->et.et_stop = a10_timer_timer_stop;
sc->et.et_priv = sc;
@@ -225,8 +221,8 @@ a10_timer_attach(device_t dev)
}
static int
-a10_timer_timer_start(struct eventtimer *et, struct bintime *first,
- struct bintime *period)
+a10_timer_timer_start(struct eventtimer *et, sbintime_t first,
+ sbintime_t period)
{
struct a10_timer_softc *sc;
uint32_t count;
@@ -234,26 +230,21 @@ a10_timer_timer_start(struct eventtimer *et, struct bintime *first,
sc = (struct a10_timer_softc *)et->et_priv;
- sc->sc_period = 0;
-
- if (period != NULL) {
- sc->sc_period = (sc->et.et_frequency * (period->frac >> 32)) >> 32;
- sc->sc_period += sc->et.et_frequency * period->sec;
- }
- if (first == NULL)
+ if (period != 0)
+ sc->sc_period = ((uint32_t)et->et_frequency * period) >> 32;
+ else
+ sc->sc_period = 0;
+ if (first != 0)
+ count = ((uint32_t)et->et_frequency * first) >> 32;
+ else
count = sc->sc_period;
- else {
- count = (sc->et.et_frequency * (first->frac >> 32)) >> 32;
- if (first->sec != 0)
- count += sc->et.et_frequency * first->sec;
- }
/* Update timer values */
timer_write_4(sc, SW_TIMER0_INT_VALUE_REG, sc->sc_period);
timer_write_4(sc, SW_TIMER0_CUR_VALUE_REG, count);
val = timer_read_4(sc, SW_TIMER0_CTRL_REG);
- if (first == NULL) {
+ if (period != 0) {
/* periodic */
val |= TIMER_AUTORELOAD;
} else {
diff --git a/sys/arm/arm/mpcore_timer.c b/sys/arm/arm/mpcore_timer.c
index 41a0b27..8445d3d 100644
--- a/sys/arm/arm/mpcore_timer.c
+++ b/sys/arm/arm/mpcore_timer.c
@@ -167,31 +167,23 @@ arm_tmr_get_timecount(struct timecounter *tc)
* Always returns 0
*/
static int
-arm_tmr_start(struct eventtimer *et, struct bintime *first,
- struct bintime *period)
+arm_tmr_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
{
- struct arm_tmr_softc *sc = (struct arm_tmr_softc *)et->et_priv;
uint32_t load, count;
uint32_t ctrl;
ctrl = PRV_TIMER_CTRL_IRQ_ENABLE | PRV_TIMER_CTRL_TIMER_ENABLE;
- if (period != NULL) {
- load = (et->et_frequency * (period->frac >> 32)) >> 32;
- if (period->sec > 0)
- load += et->et_frequency * period->sec;
+ if (period != 0) {
+ load = ((uint32_t)et->et_frequency * period) >> 32;
ctrl |= PRV_TIMER_CTRL_AUTO_RELOAD;
- } else {
+ } else
load = 0;
- }
- if (first != NULL) {
- count = (sc->et.et_frequency * (first->frac >> 32)) >> 32;
- if (first->sec != 0)
- count += sc->et.et_frequency * first->sec;
- } else {
+ if (first != 0)
+ count = ((uint32_t)et->et_frequency * first) >> 32;
+ else
count = load;
- }
tmr_prv_write_4(PRV_TIMER_LOAD, load);
tmr_prv_write_4(PRV_TIMER_COUNT, count);
@@ -330,12 +322,8 @@ arm_tmr_attach(device_t dev)
sc->et.et_quality = 1000;
sc->et.et_frequency = sc->clkfreq;
- sc->et.et_min_period.sec = 0;
- sc->et.et_min_period.frac =
- ((0x00000002LLU << 32) / sc->et.et_frequency) << 32;
- sc->et.et_max_period.sec = 0xfffffff0U / sc->et.et_frequency;
- sc->et.et_max_period.frac =
- ((0xfffffffeLLU << 32) / sc->et.et_frequency) << 32;
+ sc->et.et_min_period = (0x00000002LLU << 32) / sc->et.et_frequency;
+ sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
sc->et.et_start = arm_tmr_start;
sc->et.et_stop = arm_tmr_stop;
sc->et.et_priv = sc;
diff --git a/sys/arm/broadcom/bcm2835/bcm2835_systimer.c b/sys/arm/broadcom/bcm2835/bcm2835_systimer.c
index 97ec43a..1d7fdda 100644
--- a/sys/arm/broadcom/bcm2835/bcm2835_systimer.c
+++ b/sys/arm/broadcom/bcm2835/bcm2835_systimer.c
@@ -118,19 +118,16 @@ bcm_systimer_tc_get_timecount(struct timecounter *tc)
}
static int
-bcm_systimer_start(struct eventtimer *et, struct bintime *first,
- struct bintime *period)
+bcm_systimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
{
struct systimer *st = et->et_priv;
uint32_t clo;
uint32_t count;
register_t s;
- if (first != NULL) {
+ if (first != 0) {
- count = (st->et.et_frequency * (first->frac >> 32)) >> 32;
- if (first->sec != 0)
- count += st->et.et_frequency * first->sec;
+ count = ((uint32_t)et->et_frequency * first) >> 32;
s = intr_disable();
clo = bcm_systimer_tc_read_4(SYSTIMER_CLO);
@@ -238,12 +235,10 @@ bcm_systimer_attach(device_t dev)
sc->st[DEFAULT_TIMER].et.et_flags = ET_FLAGS_ONESHOT;
sc->st[DEFAULT_TIMER].et.et_quality = 1000;
sc->st[DEFAULT_TIMER].et.et_frequency = sc->sysclk_freq;
- sc->st[DEFAULT_TIMER].et.et_min_period.sec = 0;
- sc->st[DEFAULT_TIMER].et.et_min_period.frac =
- ((MIN_PERIOD << 32) / sc->st[DEFAULT_TIMER].et.et_frequency) << 32;
- sc->st[DEFAULT_TIMER].et.et_max_period.sec = 0xfffffff0U / sc->st[DEFAULT_TIMER].et.et_frequency;
- sc->st[DEFAULT_TIMER].et.et_max_period.frac =
- ((0xfffffffeLLU << 32) / sc->st[DEFAULT_TIMER].et.et_frequency) << 32;
+ sc->st[DEFAULT_TIMER].et.et_min_period =
+ (MIN_PERIOD << 32) / sc->st[DEFAULT_TIMER].et.et_frequency;
+ sc->st[DEFAULT_TIMER].et.et_max_period =
+ (0xfffffffeLLU << 32) / sc->st[DEFAULT_TIMER].et.et_frequency;
sc->st[DEFAULT_TIMER].et.et_start = bcm_systimer_start;
sc->st[DEFAULT_TIMER].et.et_stop = bcm_systimer_stop;
sc->st[DEFAULT_TIMER].et.et_priv = &sc->st[DEFAULT_TIMER];
diff --git a/sys/arm/lpc/lpc_timer.c b/sys/arm/lpc/lpc_timer.c
index 87ed104..8572e1a 100644
--- a/sys/arm/lpc/lpc_timer.c
+++ b/sys/arm/lpc/lpc_timer.c
@@ -72,8 +72,8 @@ static struct lpc_timer_softc *timer_softc = NULL;
static int lpc_timer_initialized = 0;
static int lpc_timer_probe(device_t);
static int lpc_timer_attach(device_t);
-static int lpc_timer_start(struct eventtimer *, struct bintime *first,
- struct bintime *);
+static int lpc_timer_start(struct eventtimer *,
+ sbintime_t first, sbintime_t period);
static int lpc_timer_stop(struct eventtimer *et);
static unsigned lpc_get_timecount(struct timecounter *);
static int lpc_hardclock(void *);
@@ -173,12 +173,8 @@ lpc_timer_attach(device_t dev)
sc->lt_et.et_name = "LPC32x0 Timer0";
sc->lt_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT;
sc->lt_et.et_quality = 1000;
- sc->lt_et.et_min_period.sec = 0;
- sc->lt_et.et_min_period.frac =
- ((0x00000002LLU << 32) / sc->lt_et.et_frequency) << 32;
- sc->lt_et.et_max_period.sec = 0xfffffff0U / sc->lt_et.et_frequency;
- sc->lt_et.et_max_period.frac =
- ((0xfffffffeLLU << 32) / sc->lt_et.et_frequency) << 32;
+ sc->lt_et.et_min_period = (0x00000002LLU << 32) / sc->lt_et.et_frequency;
+ sc->lt_et.et_max_period = (0xfffffffeLLU << 32) / sc->lt_et.et_frequency;
sc->lt_et.et_start = lpc_timer_start;
sc->lt_et.et_stop = lpc_timer_stop;
sc->lt_et.et_priv = sc;
@@ -199,27 +195,23 @@ lpc_timer_attach(device_t dev)
}
static int
-lpc_timer_start(struct eventtimer *et, struct bintime *first,
- struct bintime *period)
+lpc_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
{
struct lpc_timer_softc *sc = (struct lpc_timer_softc *)et->et_priv;
uint32_t ticks;
- if (period == NULL)
+ if (period == 0) {
sc->lt_oneshot = 1;
- else {
+ sc->lt_period = 0;
+ } else {
sc->lt_oneshot = 0;
- sc->lt_period = (sc->lt_et.et_frequency * (first->frac >> 32)) >> 32;
- sc->lt_period += sc->lt_et.et_frequency * first->sec;
+ sc->lt_period = ((uint32_t)et->et_frequency * period) >> 32;
}
- if (first == NULL)
+ if (first == 0)
ticks = sc->lt_period;
- else {
- ticks = (sc->lt_et.et_frequency * (first->frac >> 32)) >> 32;
- if (first->sec != 0)
- ticks += sc->lt_et.et_frequency * first->sec;
- }
+ else
+ ticks = ((uint32_t)et->et_frequency * first) >> 32;
/* Reset timer */
timer0_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_RESET);
diff --git a/sys/arm/mv/timer.c b/sys/arm/mv/timer.c
index db6e404..51a6c17 100644
--- a/sys/arm/mv/timer.c
+++ b/sys/arm/mv/timer.c
@@ -93,7 +93,7 @@ static void mv_watchdog_enable(void);
static void mv_watchdog_disable(void);
static void mv_watchdog_event(void *, unsigned int, int *);
static int mv_timer_start(struct eventtimer *et,
- struct bintime *first, struct bintime *period);
+ sbintime_t first, sbintime_t period);
static int mv_timer_stop(struct eventtimer *et);
static void mv_setup_timers(void);
@@ -168,12 +168,8 @@ mv_timer_attach(device_t dev)
sc->et.et_quality = 1000;
sc->et.et_frequency = MV_CLOCK_SRC;
- sc->et.et_min_period.sec = 0;
- sc->et.et_min_period.frac =
- ((0x00000002LLU << 32) / sc->et.et_frequency) << 32;
- sc->et.et_max_period.sec = 0xfffffff0U / sc->et.et_frequency;
- sc->et.et_max_period.frac =
- ((0xfffffffeLLU << 32) / sc->et.et_frequency) << 32;
+ sc->et.et_min_period = (0x00000002LLU << 32) / sc->et.et_frequency;
+ sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
sc->et.et_start = mv_timer_start;
sc->et.et_stop = mv_timer_stop;
sc->et.et_priv = sc;
@@ -394,25 +390,20 @@ mv_watchdog_event(void *arg, unsigned int cmd, int *error)
}
static int
-mv_timer_start(struct eventtimer *et,
- struct bintime *first, struct bintime *period)
+mv_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
{
struct mv_timer_softc *sc;
uint32_t val, val1;
/* Calculate dividers. */
sc = (struct mv_timer_softc *)et->et_priv;
- if (period != NULL) {
- val = (sc->et.et_frequency * (period->frac >> 32)) >> 32;
- if (period->sec != 0)
- val += sc->et.et_frequency * period->sec;
- } else
+ if (period != 0)
+ val = ((uint32_t)sc->et.et_frequency * period) >> 32;
+ else
val = 0;
- if (first != NULL) {
- val1 = (sc->et.et_frequency * (first->frac >> 32)) >> 32;
- if (first->sec != 0)
- val1 += sc->et.et_frequency * first->sec;
- } else
+ if (first != 0)
+ val1 = ((uint32_t)sc->et.et_frequency * first) >> 32;
+ else
val1 = val;
/* Apply configuration. */
@@ -420,7 +411,7 @@ mv_timer_start(struct eventtimer *et,
mv_set_timer(0, val1);
val = mv_get_timer_control();
val |= CPU_TIMER0_EN;
- if (period != NULL)
+ if (period != 0)
val |= CPU_TIMER0_AUTO;
else
val &= ~CPU_TIMER0_AUTO;
diff --git a/sys/arm/ti/am335x/am335x_dmtimer.c b/sys/arm/ti/am335x/am335x_dmtimer.c
index be9832c..93911f2 100644
--- a/sys/arm/ti/am335x/am335x_dmtimer.c
+++ b/sys/arm/ti/am335x/am335x_dmtimer.c
@@ -143,30 +143,24 @@ am335x_dmtimer_tc_get_timecount(struct timecounter *tc)
}
static int
-am335x_dmtimer_start(struct eventtimer *et, struct bintime *first,
- struct bintime *period)
+am335x_dmtimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
{
struct am335x_dmtimer *tmr = (struct am335x_dmtimer *)et->et_priv;
uint32_t load, count;
uint32_t tclr = 0;
- if (period != NULL) {
- load = (et->et_frequency * (period->frac >> 32)) >> 32;
- if (period->sec > 0)
- load += et->et_frequency * period->sec;
+ if (period != 0) {
+ load = ((uint32_t)et->et_frequency * period) >> 32;
tclr |= 2; /* autoreload bit */
panic("periodic timer not implemented\n");
} else {
load = 0;
}
- if (first != NULL) {
- count = (tmr->et.et_frequency * (first->frac >> 32)) >> 32;
- if (first->sec != 0)
- count += tmr->et.et_frequency * first->sec;
- } else {
+ if (first != 0)
+ count = ((uint32_t)et->et_frequency * first) >> 32;
+ else
count = load;
- }
/* Reset Timer */
am335x_dmtimer_et_write_4(DMTIMER_TSICR, 2);
@@ -316,12 +310,10 @@ am335x_dmtimer_attach(device_t dev)
sc->t[3].et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT;
sc->t[3].et.et_quality = 1000;
sc->t[3].et.et_frequency = sc->sysclk_freq;
- sc->t[3].et.et_min_period.sec = 0;
- sc->t[3].et.et_min_period.frac =
- ((0x00000002LLU << 32) / sc->t[3].et.et_frequency) << 32;
- sc->t[3].et.et_max_period.sec = 0xfffffff0U / sc->t[3].et.et_frequency;
- sc->t[3].et.et_max_period.frac =
- ((0xfffffffeLLU << 32) / sc->t[3].et.et_frequency) << 32;
+ sc->t[3].et.et_min_period =
+ (0x00000002LLU << 32) / sc->t[3].et.et_frequency;
+ sc->t[3].et.et_max_period =
+ (0xfffffffeLLU << 32) / sc->t[3].et.et_frequency;
sc->t[3].et.et_start = am335x_dmtimer_start;
sc->t[3].et.et_stop = am335x_dmtimer_stop;
sc->t[3].et.et_priv = &sc->t[3];
diff --git a/sys/arm/versatile/sp804.c b/sys/arm/versatile/sp804.c
index 82a1889..000ccb6 100644
--- a/sys/arm/versatile/sp804.c
+++ b/sys/arm/versatile/sp804.c
@@ -120,18 +120,15 @@ sp804_timer_tc_get_timecount(struct timecounter *tc)
}
static int
-sp804_timer_start(struct eventtimer *et, struct bintime *first,
- struct bintime *period)
+sp804_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
{
struct sp804_timer_softc *sc = et->et_priv;
uint32_t count, reg;
- if (first != NULL) {
+ if (first != 0) {
sc->et_enabled = 1;
- count = (sc->et.et_frequency * (first->frac >> 32)) >> 32;
- if (first->sec != 0)
- count += sc->et.et_frequency * first->sec;
+ count = ((uint32_t)et->et_frequency * first) >> 32;
sp804_timer_tc_write_4(SP804_TIMER2_LOAD, count);
reg = TIMER_CONTROL_32BIT | TIMER_CONTROL_INTREN |
@@ -142,7 +139,7 @@ sp804_timer_start(struct eventtimer *et, struct bintime *first,
return (0);
}
- if (period != NULL) {
+ if (period != 0) {
panic("period");
}
@@ -264,12 +261,8 @@ sp804_timer_attach(device_t dev)
sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT;
sc->et.et_quality = 1000;
sc->et.et_frequency = sc->sysclk_freq / DEFAULT_DIVISOR;
- sc->et.et_min_period.sec = 0;
- sc->et.et_min_period.frac =
- ((0x00000002LLU << 32) / sc->et.et_frequency) << 32;
- sc->et.et_max_period.sec = 0xfffffff0U / sc->et.et_frequency;
- sc->et.et_max_period.frac =
- ((0xfffffffeLLU << 32) / sc->et.et_frequency) << 32;
+ sc->et.et_min_period = (0x00000002LLU << 32) / sc->et.et_frequency;
+ sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
sc->et.et_start = sp804_timer_start;
sc->et.et_stop = sp804_timer_stop;
sc->et.et_priv = sc;
OpenPOWER on IntegriCloud