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author | ian <ian@FreeBSD.org> | 2013-12-13 22:22:54 +0000 |
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committer | ian <ian@FreeBSD.org> | 2013-12-13 22:22:54 +0000 |
commit | 0c80ffaa7f7724296f184c150e855688b897e197 (patch) | |
tree | 470967c715f6b6bfd6f1bc891d5bc8a5a58449ed /sys/arm | |
parent | 806c36728f688bceb163bcfdee15e8855757dbee (diff) | |
download | FreeBSD-src-0c80ffaa7f7724296f184c150e855688b897e197.zip FreeBSD-src-0c80ffaa7f7724296f184c150e855688b897e197.tar.gz |
MFC r257418:
Don't iterate through the bits of the pending interrupt register if the
whole register is zero. Most of the registers will be zero most of the time.
Diffstat (limited to 'sys/arm')
-rw-r--r-- | sys/arm/freescale/imx/tzic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/arm/freescale/imx/tzic.c b/sys/arm/freescale/imx/tzic.c index 69d84de..d8a579f 100644 --- a/sys/arm/freescale/imx/tzic.c +++ b/sys/arm/freescale/imx/tzic.c @@ -163,7 +163,7 @@ arm_get_next_irq(int last_irq) for (i = 0; i < 4; i++) { pending = tzic_read_4(TZIC_PND(i)); - for (b = 0; b < 32; b++) + for (b = 0; pending != 0 && b < 32; b++) if (pending & (1 << b)) { return (i * 32 + b); } |