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| author | mmel <mmel@FreeBSD.org> | 2016-02-04 14:02:42 +0000 |
|---|---|---|
| committer | mmel <mmel@FreeBSD.org> | 2016-02-04 14:02:42 +0000 |
| commit | b512e43ef25c82d0955c88efbebd614817b95e26 (patch) | |
| tree | ea706c4f2c5b8f6b4932206c25b7c1ec30b579ff /sys/arm | |
| parent | 855ee55df38fa7caca48484dc2530a3e7e06affc (diff) | |
| download | FreeBSD-src-b512e43ef25c82d0955c88efbebd614817b95e26.zip FreeBSD-src-b512e43ef25c82d0955c88efbebd614817b95e26.tar.gz | |
ARM: Set UNAL_ENABLE bit in SCTLR CP15 register. This bit is RAO/SBOP
for ARMv7. For ARMv6, it controls ARMv5 compatible alignment support.
This bit have no effect until unaligned access is enabled.
Diffstat (limited to 'sys/arm')
| -rw-r--r-- | sys/arm/arm/locore-v6.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/arm/arm/locore-v6.S b/sys/arm/arm/locore-v6.S index eda6014..b93af2c 100644 --- a/sys/arm/arm/locore-v6.S +++ b/sys/arm/arm/locore-v6.S @@ -132,9 +132,9 @@ ASENTRY_NP(_start) bic r7, #CPU_CONTROL_DC_ENABLE bic r7, #CPU_CONTROL_MMU_ENABLE bic r7, #CPU_CONTROL_IC_ENABLE - bic r7, #CPU_CONTROL_UNAL_ENABLE bic r7, #CPU_CONTROL_BPRD_ENABLE bic r7, #CPU_CONTROL_SW_ENABLE + orr r7, #CPU_CONTROL_UNAL_ENABLE orr r7, #CPU_CONTROL_AFLT_ENABLE orr r7, #CPU_CONTROL_VECRELOC mcr CP15_SCTLR(r7) @@ -456,9 +456,9 @@ ASENTRY_NP(mpentry) bic r0, #CPU_CONTROL_MMU_ENABLE bic r0, #CPU_CONTROL_DC_ENABLE bic r0, #CPU_CONTROL_IC_ENABLE - bic r0, #CPU_CONTROL_UNAL_ENABLE bic r0, #CPU_CONTROL_BPRD_ENABLE bic r0, #CPU_CONTROL_SW_ENABLE + orr r0, #CPU_CONTROL_UNAL_ENABLE orr r0, #CPU_CONTROL_AFLT_ENABLE orr r0, #CPU_CONTROL_VECRELOC mcr CP15_SCTLR(r0) |
