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| author | skra <skra@FreeBSD.org> | 2016-02-18 09:30:04 +0000 |
|---|---|---|
| committer | skra <skra@FreeBSD.org> | 2016-02-18 09:30:04 +0000 |
| commit | aa894ca21be2b6aa296cc5cf4f11a58612b0f5c5 (patch) | |
| tree | d0b136fd017e6518e52064affe4b954004999915 /sys/arm | |
| parent | 347c41395e2a73bf4980182b13a701abe79643c0 (diff) | |
| download | FreeBSD-src-aa894ca21be2b6aa296cc5cf4f11a58612b0f5c5.zip FreeBSD-src-aa894ca21be2b6aa296cc5cf4f11a58612b0f5c5.tar.gz | |
Remove redundant ARM_L2_ADDR_BITS and L2_ADDR_BITS definitions and
replace them by primary ones where needed.
Diffstat (limited to 'sys/arm')
| -rw-r--r-- | sys/arm/include/pmap.h | 2 | ||||
| -rw-r--r-- | sys/arm/include/pte-v6.h | 5 | ||||
| -rw-r--r-- | sys/arm/include/pte.h | 2 |
3 files changed, 1 insertions, 8 deletions
diff --git a/sys/arm/include/pmap.h b/sys/arm/include/pmap.h index 8222652..8372929 100644 --- a/sys/arm/include/pmap.h +++ b/sys/arm/include/pmap.h @@ -489,7 +489,7 @@ void pmap_use_minicache(vm_offset_t, vm_size_t); #define l1pte_page_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_C) #define l1pte_fpage_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_F) -#define l2pte_index(v) (((v) & L2_ADDR_BITS) >> L2_S_SHIFT) +#define l2pte_index(v) (((v) & L1_S_OFFSET) >> L2_S_SHIFT) #define l2pte_valid(pte) ((pte) != 0) #define l2pte_pa(pte) ((pte) & L2_S_FRAME) #define l2pte_minidata(pte) (((pte) & \ diff --git a/sys/arm/include/pte-v6.h b/sys/arm/include/pte-v6.h index 67484cc..9febb79 100644 --- a/sys/arm/include/pte-v6.h +++ b/sys/arm/include/pte-v6.h @@ -296,11 +296,6 @@ */ #define AP_KRW 0x01 /* kernel read/write */ -/* - * lib/libkvm/kvm_arm.c - */ -#define L2_ADDR_BITS 0x000ff000 /* L2 PTE address bits */ - // ----------------------------------------------------------------------------- #endif /* !_MACHINE_PTE_H_ */ diff --git a/sys/arm/include/pte.h b/sys/arm/include/pte.h index 3402454..c83ed2f 100644 --- a/sys/arm/include/pte.h +++ b/sys/arm/include/pte.h @@ -148,8 +148,6 @@ typedef pt_entry_t pt2_entry_t; /* compatibility with v6 */ * So, we allocate L2 tables 4 at a time, thus yielding a 4K L2 * table. */ -#define L2_ADDR_BITS 0x000ff000 /* L2 PTE address bits */ - #define L1_TABLE_SIZE 0x4000 /* 16K */ #define L2_TABLE_SIZE 0x1000 /* 4K */ /* |
