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author | ian <ian@FreeBSD.org> | 2015-10-24 19:39:41 +0000 |
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committer | ian <ian@FreeBSD.org> | 2015-10-24 19:39:41 +0000 |
commit | 5ade80289ed2c0d346ab56f2e0c07763b4eaf9dd (patch) | |
tree | 7f094554cd1f066a1af06ed3449017b97ab3e934 /sys/arm | |
parent | 4e43164f56da2516a68e3734ea003c8af9e4b3d2 (diff) | |
download | FreeBSD-src-5ade80289ed2c0d346ab56f2e0c07763b4eaf9dd.zip FreeBSD-src-5ade80289ed2c0d346ab56f2e0c07763b4eaf9dd.tar.gz |
Rename dcache_dma_preread() to dcache_inv_poc_dma() to make it clear that it
is a dcache invalidate to point of coherency just like dcache_inv_poc(), but
a slightly different version specific to dma operations. Elaborate the
comment about how and why it's different.
Diffstat (limited to 'sys/arm')
-rw-r--r-- | sys/arm/arm/busdma_machdep-v6.c | 4 | ||||
-rw-r--r-- | sys/arm/include/cpu-v6.h | 14 |
2 files changed, 10 insertions, 8 deletions
diff --git a/sys/arm/arm/busdma_machdep-v6.c b/sys/arm/arm/busdma_machdep-v6.c index f032504..297b129 100644 --- a/sys/arm/arm/busdma_machdep-v6.c +++ b/sys/arm/arm/busdma_machdep-v6.c @@ -1284,7 +1284,7 @@ dma_preread_safe(vm_offset_t va, vm_paddr_t pa, vm_size_t size) if ((va + size) & cpuinfo.dcache_line_mask) dcache_wb_poc(va + size, pa + size, 1); - dcache_dma_preread(va, pa, size); + dcache_inv_poc_dma(va, pa, size); } static void @@ -1406,7 +1406,7 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) if ((op & BUS_DMASYNC_PREREAD) && !(op & BUS_DMASYNC_PREWRITE)) { bpage = STAILQ_FIRST(&map->bpages); while (bpage != NULL) { - dcache_dma_preread(bpage->vaddr, bpage->busaddr, + dcache_inv_poc_dma(bpage->vaddr, bpage->busaddr, bpage->datacount); bpage = STAILQ_NEXT(bpage, links); } diff --git a/sys/arm/include/cpu-v6.h b/sys/arm/include/cpu-v6.h index 7465a89..cf845c6 100644 --- a/sys/arm/include/cpu-v6.h +++ b/sys/arm/include/cpu-v6.h @@ -471,15 +471,17 @@ dcache_inv_poc(vm_offset_t va, vm_paddr_t pa, vm_size_t size) } /* - * Discard D-cache lines to PoC, prior to overwrite by DMA engine + * Discard D-cache lines to PoC, prior to overwrite by DMA engine. * - * Invalidate caches, discarding data in dirty lines. This is useful - * if the memory is about to be overwritten, e.g. by a DMA engine. - * Invalidate caches from innermost to outermost to follow the flow - * of dirty cachelines. + * Normal invalidation does L2 then L1 to ensure that stale data from L2 doesn't + * flow into L1 while invalidating. This routine is intended to be used only + * when invalidating a buffer before a DMA operation loads new data into memory. + * The concern in this case is that dirty lines are not evicted to main memory, + * overwriting the DMA data. For that reason, the L1 is done first to ensure + * that an evicted L1 line doesn't flow to L2 after the L2 has been cleaned. */ static __inline void -dcache_dma_preread(vm_offset_t va, vm_paddr_t pa, vm_size_t size) +dcache_inv_poc_dma(vm_offset_t va, vm_paddr_t pa, vm_size_t size) { vm_offset_t eva = va + size; |