Remove pd_prot and pd_cache members from struct arm_devmap_entry.

The struct is used for definition of static device mappings which
should always have same protection and attributes.

15 files changed, 31 insertions, 109 deletions

diff --git a/sys/arm/arm/bus_space_generic.c b/sys/arm/arm/bus_space_generic.c
index 7beda42..8fdac8c 100644
--- a/sys/arm/arm/bus_space_generic.c
+++ b/sys/arm/arm/bus_space_generic.c
@@ -71,8 +71,8 @@ generic_bs_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags,
 
 	/*
 	 * We don't even examine the passed-in flags.  For ARM, the CACHEABLE
-	 * flag doesn't make sense (we create PTE_DEVICE mappings), and the
-	 * LINEAR flag is just implied because we use kva_alloc(size).
+	 * flag doesn't make sense (we create VM_MEMATTR_DEVICE mappings), and
+	 * the LINEAR flag is just implied because we use kva_alloc(size).
 	 */
 	if ((va = pmap_mapdev(bpa, size)) == NULL)
 		return (ENOMEM);
diff --git a/sys/arm/arm/devmap.c b/sys/arm/arm/devmap.c
index 011b579..b5b315d 100644
--- a/sys/arm/arm/devmap.c
+++ b/sys/arm/arm/devmap.c
@@ -52,7 +52,6 @@ static boolean_t devmap_bootstrap_done = false;
 
 #if defined(__aarch64__)
 #define	MAX_VADDR	VM_MAX_KERNEL_ADDRESS
-#define	PTE_DEVICE	VM_MEMATTR_DEVICE
 #elif defined(__arm__)
 #define	MAX_VADDR	ARM_VECTORS_HIGH
 #endif
@@ -165,8 +164,6 @@ arm_devmap_add_entry(vm_paddr_t pa, vm_size_t sz)
 	m->pd_va    = akva_devmap_vaddr;
 	m->pd_pa    = pa;
 	m->pd_size  = sz;
-	m->pd_prot  = VM_PROT_READ | VM_PROT_WRITE;
-	m->pd_cache = PTE_DEVICE;
 }
 
 /*
@@ -209,10 +206,10 @@ arm_devmap_bootstrap(vm_offset_t l1pt, const struct arm_devmap_entry *table)
 #if defined(__arm__)
 #if __ARM_ARCH >= 6
 		pmap_preboot_map_attr(pd->pd_pa, pd->pd_va, pd->pd_size,
-		    pd->pd_prot, pd->pd_cache);
+		    VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE);
 #else
 		pmap_map_chunk(l1pt, pd->pd_va, pd->pd_pa, pd->pd_size,
-		    pd->pd_prot, pd->pd_cache);
+		    VM_PROT_READ | VM_PROT_WRITE, PTE_DEVICE);
 #endif
 #elif defined(__aarch64__)
 		pmap_kenter_device(pd->pd_va, pd->pd_size, pd->pd_pa);
@@ -270,7 +267,8 @@ arm_devmap_vtop(void * vpva, vm_size_t size)
  * range, otherwise it allocates kva space and maps the physical pages into it.
  *
  * This routine is intended to be used for mapping device memory, NOT real
- * memory; the mapping type is inherently PTE_DEVICE in pmap_kenter_device().
+ * memory; the mapping type is inherently VM_MEMATTR_DEVICE in
+ * pmap_kenter_device().
  */
 void *
 pmap_mapdev(vm_offset_t pa, vm_size_t size)
diff --git a/sys/arm/at91/at91_machdep.c b/sys/arm/at91/at91_machdep.c
index e904780..50a3cf0 100644
--- a/sys/arm/at91/at91_machdep.c
+++ b/sys/arm/at91/at91_machdep.c
@@ -128,8 +128,6 @@ const struct arm_devmap_entry at91_devmap[] = {
 		0xdff00000,
 		0xfff00000,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	/* There's a notion that we should do the rest of these lazily. */
 	/*
@@ -152,16 +150,12 @@ const struct arm_devmap_entry at91_devmap[] = {
 		AT91RM92_OHCI_VA_BASE,
 		AT91RM92_OHCI_BASE,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		/* CompactFlash controller. Portion of EBI CS4 1MB */
 		AT91RM92_CF_VA_BASE,
 		AT91RM92_CF_BASE,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	/*
 	 * The next two should be good for the 9260, 9261 and 9G20 since
@@ -172,16 +166,12 @@ const struct arm_devmap_entry at91_devmap[] = {
 		AT91SAM9G20_OHCI_VA_BASE,
 		AT91SAM9G20_OHCI_BASE,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		/* EBI CS3 256MB */
 		AT91SAM9G20_NAND_VA_BASE,
 		AT91SAM9G20_NAND_BASE,
 		AT91SAM9G20_NAND_SIZE,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	/*
 	 * The next should be good for the 9G45.
@@ -191,10 +181,8 @@ const struct arm_devmap_entry at91_devmap[] = {
 		AT91SAM9G45_OHCI_VA_BASE,
 		AT91SAM9G45_OHCI_BASE,
 		0x00100000,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 #ifdef LINUX_BOOT_ABI
diff --git a/sys/arm/cavium/cns11xx/econa_machdep.c b/sys/arm/cavium/cns11xx/econa_machdep.c
index e212a10..0ccc15e 100644
--- a/sys/arm/cavium/cns11xx/econa_machdep.c
+++ b/sys/arm/cavium/cns11xx/econa_machdep.c
@@ -113,8 +113,6 @@ static const struct arm_devmap_entry econa_devmap[] = {
 		ECONA_SDRAM_BASE, /*virtual*/
 		ECONA_SDRAM_BASE, /*physical*/
 		ECONA_SDRAM_SIZE, /*size*/
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	/*
 	 * Map the on-board devices VA == PA so that we can access them
@@ -128,8 +126,6 @@ static const struct arm_devmap_entry econa_devmap[] = {
 		ECONA_IO_BASE, /*virtual*/
 		ECONA_IO_BASE, /*physical*/
 		ECONA_IO_SIZE, /*size*/
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		/*
@@ -138,8 +134,6 @@ static const struct arm_devmap_entry econa_devmap[] = {
 		ECONA_OHCI_VBASE, /*virtual*/
 		ECONA_OHCI_PBASE, /*physical*/
 		ECONA_USB_SIZE, /*size*/
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		/*
@@ -148,15 +142,11 @@ static const struct arm_devmap_entry econa_devmap[] = {
 		ECONA_CFI_VBASE, /*virtual*/
 		ECONA_CFI_PBASE, /*physical*/
 		ECONA_CFI_SIZE,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{
 		0,
 		0,
 		0,
-		0,
-		0,
 	}
 };
 
diff --git a/sys/arm/freescale/imx/imx6_machdep.c b/sys/arm/freescale/imx/imx6_machdep.c
index eaa380d..1abbd6c 100644
--- a/sys/arm/freescale/imx/imx6_machdep.c
+++ b/sys/arm/freescale/imx/imx6_machdep.c
@@ -136,7 +136,7 @@ imx6_late_init(platform_t plat)
  * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
  * the memory map.  When we get support for graphics it might make sense to
  * static map some of that area.  Be careful with other things in that area such
- * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory.
+ * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory.
  */
 static int
 imx6_devmap_init(platform_t plat)
diff --git a/sys/arm/include/devmap.h b/sys/arm/include/devmap.h
index 39fcf7f..d05c781 100644
--- a/sys/arm/include/devmap.h
+++ b/sys/arm/include/devmap.h
@@ -37,8 +37,6 @@ struct arm_devmap_entry {
 	vm_offset_t	pd_va;		/* virtual address */
 	vm_paddr_t	pd_pa;		/* physical address */
 	vm_size_t	pd_size;	/* size of region */
-	vm_prot_t	pd_prot;	/* protection code */
-	int		pd_cache;	/* cache attributes */
 };
 
 /*
diff --git a/sys/arm/include/pmap-v6.h b/sys/arm/include/pmap-v6.h
index 0678977..1c1f6ef 100644
--- a/sys/arm/include/pmap-v6.h
+++ b/sys/arm/include/pmap-v6.h
@@ -250,8 +250,6 @@ void pmap_preboot_map_attr(vm_paddr_t, vm_offset_t, vm_size_t, vm_prot_t,
  */
 void vector_page_setprot(int);
 
-#define PTE_DEVICE	VM_MEMATTR_DEVICE
-
 #endif	/* _KERNEL */
 // -----------------------------------------------------------------------------
 
diff --git a/sys/arm/mv/mv_localbus.c b/sys/arm/mv/mv_localbus.c
index cb1fbcc..f7a80fe 100644
--- a/sys/arm/mv/mv_localbus.c
+++ b/sys/arm/mv/mv_localbus.c
@@ -477,8 +477,6 @@ fdt_localbus_devmap(phandle_t dt_node, struct arm_devmap_entry *fdt_devmap,
 		fdt_devmap[j].pd_va = localbus_virtmap[va_index].va;
 		fdt_devmap[j].pd_pa = offset;
 		fdt_devmap[j].pd_size = size;
-		fdt_devmap[j].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-		fdt_devmap[j].pd_cache = PTE_DEVICE;
 
 		/* Copy data to structure used by localbus driver */
 		localbus_banks[bank].va = fdt_devmap[j].pd_va;
diff --git a/sys/arm/mv/mv_machdep.c b/sys/arm/mv/mv_machdep.c
index 8f0375b..e7ddc87 100644
--- a/sys/arm/mv/mv_machdep.c
+++ b/sys/arm/mv/mv_machdep.c
@@ -271,7 +271,7 @@ platform_late_init(void)
 
 #define FDT_DEVMAP_MAX	(MV_WIN_CPU_MAX + 2)
 static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_MAX] = {
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 static int
@@ -302,8 +302,6 @@ moveon:
 	map->pd_va = MV_CESA_SRAM_BASE; /* XXX */
 	map->pd_pa = base;
 	map->pd_size = size;
-	map->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	map->pd_cache = PTE_DEVICE;
 
 	return (0);
 out:
@@ -368,8 +366,6 @@ platform_devmap_init(void)
 	fdt_devmap[i].pd_va = fdt_immr_va;
 	fdt_devmap[i].pd_pa = fdt_immr_pa;
 	fdt_devmap[i].pd_size = fdt_immr_size;
-	fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	fdt_devmap[i].pd_cache = PTE_DEVICE;
 	i++;
 
 	/*
diff --git a/sys/arm/mv/mv_pci.c b/sys/arm/mv/mv_pci.c
index 2dd45eb..91ffa47 100644
--- a/sys/arm/mv/mv_pci.c
+++ b/sys/arm/mv/mv_pci.c
@@ -233,15 +233,11 @@ mv_pci_devmap(phandle_t node, struct arm_devmap_entry *devmap, vm_offset_t io_va
 	devmap->pd_va = (io_va ? io_va : io_space.base_parent);
 	devmap->pd_pa = io_space.base_parent;
 	devmap->pd_size = io_space.len;
-	devmap->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	devmap->pd_cache = PTE_DEVICE;
 	devmap++;
 
 	devmap->pd_va = (mem_va ? mem_va : mem_space.base_parent);
 	devmap->pd_pa = mem_space.base_parent;
 	devmap->pd_size = mem_space.len;
-	devmap->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	devmap->pd_cache = PTE_DEVICE;
 	return (0);
 }
 
diff --git a/sys/arm/mv/orion/db88f5xxx.c b/sys/arm/mv/orion/db88f5xxx.c
index 15751cc..a5c189e 100644
--- a/sys/arm/mv/orion/db88f5xxx.c
+++ b/sys/arm/mv/orion/db88f5xxx.c
@@ -82,45 +82,33 @@ const struct arm_devmap_entry db88f5xxx_devmap[] = {
 		MV_BASE,
 		MV_PHYS_BASE,
 		MV_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* PCIE I/O */
 		MV_PCIE_IO_BASE,
 		MV_PCIE_IO_PHYS_BASE,
 		MV_PCIE_IO_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* PCIE Memory */
 		MV_PCIE_MEM_BASE,
 		MV_PCIE_MEM_PHYS_BASE,
 		MV_PCIE_MEM_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* PCI I/O */
 		MV_PCI_IO_BASE,
 		MV_PCI_IO_PHYS_BASE,
 		MV_PCI_IO_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* PCI Memory */
 		MV_PCI_MEM_BASE,
 		MV_PCI_MEM_PHYS_BASE,
 		MV_PCI_MEM_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
 	{ /* 7-seg LED */
 		MV_DEV_CS0_BASE,
 		MV_DEV_CS0_PHYS_BASE,
 		MV_DEV_CS0_SIZE,
-		VM_PROT_READ | VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 /*
diff --git a/sys/arm/versatile/versatile_machdep.c b/sys/arm/versatile/versatile_machdep.c
index ac3ebd2..abc1ebc 100644
--- a/sys/arm/versatile/versatile_machdep.c
+++ b/sys/arm/versatile/versatile_machdep.c
@@ -82,8 +82,8 @@ platform_late_init(void)
 
 #define FDT_DEVMAP_MAX	(2)		/* FIXME */
 static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_MAX] = {
-	{ 0, 0, 0, 0, 0, },
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, },
+	{ 0, 0, 0, }
 };
 
 
@@ -97,8 +97,6 @@ platform_devmap_init(void)
 	fdt_devmap[i].pd_va = 0xf0100000;
 	fdt_devmap[i].pd_pa = 0x10100000;
 	fdt_devmap[i].pd_size = 0x01000000;       /* 1 MB */
-	fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	fdt_devmap[i].pd_cache = PTE_DEVICE;
 
 	arm_devmap_register_table(&fdt_devmap[0]);
 	return (0);
diff --git a/sys/arm/xscale/i8134x/crb_machdep.c b/sys/arm/xscale/i8134x/crb_machdep.c
index 2936963..eb3d08c 100644
--- a/sys/arm/xscale/i8134x/crb_machdep.c
+++ b/sys/arm/xscale/i8134x/crb_machdep.c
@@ -125,8 +125,6 @@ static const struct arm_devmap_entry iq81342_devmap[] = {
 		    IOP34X_VADDR,
 		    IOP34X_HWADDR,
 		    IOP34X_SIZE,
-		    VM_PROT_READ|VM_PROT_WRITE,
-		    PTE_DEVICE,
 	    },
 	    {
 		    /*
@@ -136,22 +134,16 @@ static const struct arm_devmap_entry iq81342_devmap[] = {
 		    IOP34X_PCIX_OIOBAR_VADDR &~ (0x100000 - 1),
 		    IOP34X_PCIX_OIOBAR &~ (0x100000 - 1),
 		    0x100000,
-		    VM_PROT_READ|VM_PROT_WRITE,
-		    PTE_DEVICE,
 	    },
 	    {
 		    IOP34X_PCE1_VADDR,
 		    IOP34X_PCE1,
 		    IOP34X_PCE1_SIZE,
-		    VM_PROT_READ|VM_PROT_WRITE,
-		    PTE_DEVICE,
 	    },
 	    {	
 		    0,
 		    0,
 		    0,
-		    0,
-		    0,
 	    }
 };
 
diff --git a/sys/arm/xscale/ixp425/avila_machdep.c b/sys/arm/xscale/ixp425/avila_machdep.c
index f8632e1..db2be88 100644
--- a/sys/arm/xscale/ixp425/avila_machdep.c
+++ b/sys/arm/xscale/ixp425/avila_machdep.c
@@ -119,32 +119,26 @@ struct pv_addr minidataclean;
 /* Static device mappings. */
 static const struct arm_devmap_entry ixp425_devmap[] = {
 	/* Physical/Virtual address for I/O space */
-    { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, },
 
 	/* Expansion Bus */
-    { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, },
 
 	/* CFI Flash on the Expansion Bus */
     { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
-      IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+      IXP425_EXP_BUS_CS0_SIZE, },
 
 	/* IXP425 PCI Configuration */
-    { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, },
 
 	/* SDRAM Controller */
-    { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE, },
 
 	/* PCI Memory Space */
-    { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, },
 
 	/* Q-Mgr Memory Space */
-    { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, },
 
     { 0 },
 };
@@ -152,46 +146,36 @@ static const struct arm_devmap_entry ixp425_devmap[] = {
 /* Static device mappings. */
 static const struct arm_devmap_entry ixp435_devmap[] = {
 	/* Physical/Virtual address for I/O space */
-    { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, },
 
-    { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, },
 
 	/* IXP425 PCI Configuration */
-    { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, },
 
 	/* DDRII Controller NB: mapped same place as IXP425 */
-    { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE, },
 
 	/* PCI Memory Space */
-    { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, },
 
 	/* Q-Mgr Memory Space */
-    { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, },
 
 	/* CFI Flash on the Expansion Bus */
     { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
-      IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+      IXP425_EXP_BUS_CS0_SIZE, },
 
 	/* USB1 Memory Space */
-    { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE, },
 	/* USB2 Memory Space */
-    { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE, },
 
 	/* GPS Memory Space */
-    { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE, },
 
 	/* RS485 Memory Space */
-    { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE,
-      VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+    { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE, },
 
     { 0 }
 };
diff --git a/sys/arm/xscale/pxa/pxa_machdep.c b/sys/arm/xscale/pxa/pxa_machdep.c
index 2bbb835..f80b4e2 100644
--- a/sys/arm/xscale/pxa/pxa_machdep.c
+++ b/sys/arm/xscale/pxa/pxa_machdep.c
@@ -129,10 +129,8 @@ static const struct arm_devmap_entry pxa_devmap[] = {
 		PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET,
 		PXA2X0_PERIPH_START,
 		PXA250_PERIPH_END - PXA2X0_PERIPH_START,
-		VM_PROT_READ|VM_PROT_WRITE,
-		PTE_DEVICE,
 	},
-	{ 0, 0, 0, 0, 0, }
+	{ 0, 0, 0, }
 };
 
 #define SDRAM_START 0xa0000000