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authorgonzo <gonzo@FreeBSD.org>2013-02-27 08:32:34 +0000
committergonzo <gonzo@FreeBSD.org>2013-02-27 08:32:34 +0000
commitb39d0df4c94f25811ed1ba6e9b00f5ff18ba9509 (patch)
tree47bee5a7dc419cec7e6f22b51c1323ba7d473230 /sys/arm
parent4bffdc6be720eb93176e86c7b9c1c54e8749ebb5 (diff)
downloadFreeBSD-src-b39d0df4c94f25811ed1ba6e9b00f5ff18ba9509.zip
FreeBSD-src-b39d0df4c94f25811ed1ba6e9b00f5ff18ba9509.tar.gz
- Initialize GPIO_OE register based on pinmux configuration
Although AM335x TRM states that GPIO_OE register is not used and just reflects pads configuration in practice it does control pin behavior and shoiuld be set in addition to pinmux setup
Diffstat (limited to 'sys/arm')
-rw-r--r--sys/arm/ti/ti_gpio.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/sys/arm/ti/ti_gpio.c b/sys/arm/ti/ti_gpio.c
index 58de516..aa9bb8e 100644
--- a/sys/arm/ti/ti_gpio.c
+++ b/sys/arm/ti/ti_gpio.c
@@ -653,6 +653,9 @@ ti_gpio_attach(device_t dev)
struct ti_gpio_softc *sc = device_get_softc(dev);
unsigned int i;
int err = 0;
+ int pin;
+ uint32_t flags;
+ uint32_t reg_oe;
sc->sc_dev = dev;
@@ -720,6 +723,17 @@ ti_gpio_attach(device_t dev)
/* Disable interrupts for all pins */
ti_gpio_write_4(sc, i, TI_GPIO_CLEARIRQENABLE1, 0xffffffff);
ti_gpio_write_4(sc, i, TI_GPIO_CLEARIRQENABLE2, 0xffffffff);
+
+ /* Init OE registger based on pads configuration */
+ reg_oe = 0xffffffff;
+ for (pin = 0; pin < 32; pin++) {
+ ti_scm_padconf_get_gpioflags(
+ PINS_PER_BANK*i + pin, &flags);
+ if (flags & GPIO_PIN_OUTPUT)
+ reg_oe &= ~(1U << pin);
+ }
+
+ ti_gpio_write_4(sc, i, TI_GPIO_OE, reg_oe);
}
}
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