Try to bring this file closer to style(9).

1 files changed, 42 insertions, 26 deletions

diff --git a/sys/arm/at91/at91_machdep.c b/sys/arm/at91/at91_machdep.c
index b0508de..898d028 100644
--- a/sys/arm/at91/at91_machdep.c
+++ b/sys/arm/at91/at91_machdep.c
@@ -92,10 +92,12 @@ __FBSDID("$FreeBSD$");
 #include <arm/at91/at91rm92reg.h>
 #include <arm/at91/at91sam9g20reg.h>
 
-#define KERNEL_PT_SYS		0	/* Page table for mapping proc0 zero page */
+/* Page table for mapping proc0 zero page */
+#define KERNEL_PT_SYS		0
 #define KERNEL_PT_KERN		1
 #define KERNEL_PT_KERN_NUM	22
-#define KERNEL_PT_AFKERNEL	KERNEL_PT_KERN + KERNEL_PT_KERN_NUM	/* L2 table for mapping after kernel */
+/* L2 table for mapping after kernel */
+#define KERNEL_PT_AFKERNEL	KERNEL_PT_KERN + KERNEL_PT_KERN_NUM
 #define	KERNEL_PT_AFKERNEL_NUM	5
 
 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
@@ -150,7 +152,8 @@ const struct pmap_devmap at91_devmap[] = {
 		VM_PROT_READ|VM_PROT_WRITE,
 		PTE_NOCACHE,
 	},
-	/* We can't just map the OHCI registers VA == PA, because
+	/*
+	 * We can't just map the OHCI registers VA == PA, because
 	 * AT91xx_xxx_BASE belongs to the userland address space.
 	 * We could just choose a different virtual address, but a better
 	 * solution would probably be to just use pmap_mapdev() to allocate
@@ -180,8 +183,10 @@ const struct pmap_devmap at91_devmap[] = {
 		VM_PROT_READ|VM_PROT_WRITE,
 		PTE_NOCACHE,
 	},
-	/* The next two should be good for the 9260, 9261 and 9G20 since
-	 * addresses mapping is the same. */
+	/*
+	 * The next two should be good for the 9260, 9261 and 9G20 since
+	 * addresses mapping is the same.
+	 */
 	{
 		/* Internal Memory 1MB  */
 		AT91SAM9G20_OHCI_BASE,
@@ -210,16 +215,18 @@ extern int memsize[];
 long
 at91_ramsize(void)
 {
-	uint32_t cr, mr;
+	uint32_t cr, mr, *SDRAMC;
 	int banks, rows, cols, bw;
 #ifdef LINUX_BOOT_ABI
-	// If we found any ATAGs that were for memory, return the first bank.
+	/*
+	 * If we found any ATAGs that were for memory, return the first bank.
+	 */
 	if (membanks > 0)
-		return memsize[0];
+		return (memsize[0]);
 #endif
 
 	if (at91_is_rm92()) {
-		uint32_t *SDRAMC = (uint32_t *)(AT91_BASE + AT91RM92_SDRAMC_BASE);
+		SDRAMC = (uint32_t *)(AT91_BASE + AT91RM92_SDRAMC_BASE);
 		cr = SDRAMC[AT91RM92_SDRAMC_CR / 4];
 		mr = SDRAMC[AT91RM92_SDRAMC_MR / 4];
 		banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1;
@@ -227,9 +234,11 @@ at91_ramsize(void)
 		cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8;
 		bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2;
 	} else {
-		/* This should be good for the 9260, 9261, 9G20, 9G35 and 9X25 as addresses
-		 * and registers are the same */
-		uint32_t *SDRAMC = (uint32_t *)(AT91_BASE + AT91SAM9G20_SDRAMC_BASE);
+		/*
+		 * This should be good for the 9260, 9261, 9G20, 9G35 and 9X25
+		 * as addresses and registers are the same.
+		 */
+		SDRAMC = (uint32_t *)(AT91_BASE + AT91SAM9G20_SDRAMC_BASE);
 		cr = SDRAMC[AT91SAM9G20_SDRAMC_CR / 4];
 		mr = SDRAMC[AT91SAM9G20_SDRAMC_MR / 4];
 		banks = (cr & AT91SAM9G20_SDRAMC_CR_NB_4) ? 2 : 1;
@@ -241,7 +250,7 @@ at91_ramsize(void)
 	return (1 << (cols + rows + banks + bw));
 }
 
-const char *soc_type_name[] = {
+static const char *soc_type_name[] = {
 	[AT91_T_CAP9] = "at91cap9",
 	[AT91_T_RM9200] = "at91rm9200",
 	[AT91_T_SAM9260] = "at91sam9260",
@@ -255,8 +264,8 @@ const char *soc_type_name[] = {
 	[AT91_T_SAM9X5] = "at91sam9x5",
 	[AT91_T_NONE] = "UNKNOWN"
 };
-	
-const char *soc_subtype_name[] = {
+
+static const char *soc_subtype_name[] = {
 	[AT91_ST_NONE] = "UNKNOWN",
 	[AT91_ST_RM9200_BGA] = "at91rm9200_bga",
 	[AT91_ST_RM9200_PQFP] = "at91rm9200_pqfp",
@@ -288,13 +297,15 @@ at91_try_id(uint32_t dbgu_base)
 {
 	uint32_t socid;
 
-	soc_data.cidr = *(volatile uint32_t *)(AT91_BASE + dbgu_base + DBGU_C1R);
+	soc_data.cidr = *(volatile uint32_t *)(AT91_BASE + dbgu_base +
+	    DBGU_C1R);
 	socid = soc_data.cidr & ~AT91_CPU_VERSION_MASK;
 
 	soc_data.type = AT91_T_NONE;
 	soc_data.subtype = AT91_ST_NONE;
 	soc_data.family = (soc_data.cidr & AT91_CPU_FAMILY_MASK) >> 20;
-	soc_data.exid = *(volatile uint32_t *)(AT91_BASE + dbgu_base + DBGU_C2R);
+	soc_data.exid = *(volatile uint32_t *)(AT91_BASE + dbgu_base +
+	    DBGU_C2R);
 
 	switch (socid) {
 	case AT91_CPU_CAP9:
@@ -336,7 +347,7 @@ at91_try_id(uint32_t dbgu_base)
 		soc_data.type = AT91_T_SAM9X5;
 		break;
 	default:
-		return 0;
+		return (0);
 	}
 
 	switch (soc_data.type) {
@@ -378,15 +389,18 @@ at91_try_id(uint32_t dbgu_base)
 	default:
 		break;
 	}
-        snprintf(soc_data.name, sizeof(soc_data.name), "%s%s%s", soc_type_name[soc_data.type],
+	snprintf(soc_data.name, sizeof(soc_data.name), "%s%s%s",
+	    soc_type_name[soc_data.type],
 	    soc_data.subtype == AT91_ST_NONE ? "" : " subtype ",
-	    soc_data.subtype == AT91_ST_NONE ? "" : soc_subtype_name[soc_data.subtype]);
-	return 1;
+	    soc_data.subtype == AT91_ST_NONE ? "" :
+	    soc_subtype_name[soc_data.subtype]);
+	return (1);
 }
 
 static void
 at91_soc_id(void)
 {
+
 	if (!at91_try_id(AT91_DBGU0))
 		at91_try_id(AT91_DBGU1);
 }
@@ -413,13 +427,13 @@ initarm(struct arm_boot_params *abp)
 
 	freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
 	/* Define a macro to simplify memory allocation */
-#define valloc_pages(var, np)                   \
-	alloc_pages((var).pv_va, (np));         \
+#define valloc_pages(var, np)						\
+	alloc_pages((var).pv_va, (np));					\
 	(var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR);
 
-#define alloc_pages(var, np)			\
-	(var) = freemempos;		\
-	freemempos += (np * PAGE_SIZE);		\
+#define alloc_pages(var, np)						\
+	(var) = freemempos;						\
+	freemempos += (np * PAGE_SIZE);					\
 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
 
 	while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
@@ -608,6 +622,7 @@ cpu_initclocks(void)
 void
 DELAY(int n)
 {
+
 	if (soc_data.delay)
 		soc_data.delay(n);
 }
@@ -615,6 +630,7 @@ DELAY(int n)
 void
 cpu_reset(void)
 {
+
 	if (soc_data.reset)
 		soc_data.reset();
 	while (1)