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| author | ian <ian@FreeBSD.org> | 2015-05-23 22:36:41 +0000 |
|---|---|---|
| committer | ian <ian@FreeBSD.org> | 2015-05-23 22:36:41 +0000 |
| commit | 011666b0a8c74e747a5483f15fb01e9ac7dac93c (patch) | |
| tree | adb6f1b04d7fdde4fd2c8ba9ed690bd314f62381 /sys/arm | |
| parent | 132e8a35de4a2129b8843c01be9c949f9501e845 (diff) | |
| download | FreeBSD-src-011666b0a8c74e747a5483f15fb01e9ac7dac93c.zip FreeBSD-src-011666b0a8c74e747a5483f15fb01e9ac7dac93c.tar.gz | |
MFC r277098, r279235:
Introduce ofw_bus_reg_to_rl() to replace part of common bus code
Fix endianness on FDT read in ARM GIC
Diffstat (limited to 'sys/arm')
| -rw-r--r-- | sys/arm/arm/gic.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c index 4e7f3bb..3cb161a 100644 --- a/sys/arm/arm/gic.c +++ b/sys/arm/arm/gic.c @@ -204,7 +204,7 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, *trig = INTR_TRIGGER_CONFORM; *pol = INTR_POLARITY_CONFORM; } else { - if (intr[0] == 0) + if (fdt32_to_cpu(intr[0]) == 0) *interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI; else *interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI; @@ -216,13 +216,13 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, * 8 = active low level-sensitive * The hardware only supports active-high-level or rising-edge. */ - if (intr[2] & 0x0a) { + if (fdt32_to_cpu(intr[2]) & 0x0a) { printf("unsupported trigger/polarity configuration " - "0x%2x\n", intr[2] & 0x0f); + "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f); return (ENOTSUP); } *pol = INTR_POLARITY_CONFORM; - if (intr[2] & 0x01) + if (fdt32_to_cpu(intr[2]) & 0x01) *trig = INTR_TRIGGER_EDGE; else *trig = INTR_TRIGGER_LEVEL; |
