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| author | zbb <zbb@FreeBSD.org> | 2016-02-11 12:01:33 +0000 |
|---|---|---|
| committer | zbb <zbb@FreeBSD.org> | 2016-02-11 12:01:33 +0000 |
| commit | b8738668ec859266c7baace1ffc3e08ec7a7eff2 (patch) | |
| tree | 9d1294e0c3238795f178fbe2ff9ec8cb48791553 /sys/arm64 | |
| parent | 0740653d54119f91b101f35a01f9ee2a4fdec95b (diff) | |
| download | FreeBSD-src-b8738668ec859266c7baace1ffc3e08ec7a7eff2.zip FreeBSD-src-b8738668ec859266c7baace1ffc3e08ec7a7eff2.tar.gz | |
Initially bind all interrupts to the boot CPU when using GICv3
This should be done by routing all interrupts to CPU0,
different assignment will be induced by either interrupts
shuffling or bus_bind_intr().
Reviewed by: wma
Obtained from: Semihalf
Sponsored by: Cavium
Differential Revision: https://reviews.freebsd.org/D5229
Diffstat (limited to 'sys/arm64')
| -rw-r--r-- | sys/arm64/arm64/gic_v3.c | 2 | ||||
| -rw-r--r-- | sys/arm64/arm64/gic_v3_its.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/sys/arm64/arm64/gic_v3.c b/sys/arm64/arm64/gic_v3.c index c2b97a3..9c24b39 100644 --- a/sys/arm64/arm64/gic_v3.c +++ b/sys/arm64/arm64/gic_v3.c @@ -565,7 +565,7 @@ gic_v3_dist_init(struct gic_v3_softc *sc) /* * 4. Route all interrupts to boot CPU. */ - aff = CPU_AFFINITY(PCPU_GET(cpuid)); + aff = CPU_AFFINITY(0); for (i = GIC_FIRST_SPI; i < sc->gic_nirqs; i++) gic_d_write(sc, 4, GICD_IROUTER(i), aff); diff --git a/sys/arm64/arm64/gic_v3_its.c b/sys/arm64/arm64/gic_v3_its.c index 7daeabe..f22e8aa 100644 --- a/sys/arm64/arm64/gic_v3_its.c +++ b/sys/arm64/arm64/gic_v3_its.c @@ -1430,10 +1430,10 @@ its_device_alloc_locked(struct gic_v3_its_softc *sc, device_t pci_dev, } /* - * XXX ARM64TODO: Currently all interrupts are going - * to be bound to the CPU that performs the configuration. + * Initially all interrupts go to CPU0 but can be moved + * to another CPU by bus_bind_intr() or interrupts shuffling. */ - cpuid = PCPU_GET(cpuid); + cpuid = 0; newdev->col = sc->its_cols[cpuid]; TAILQ_INSERT_TAIL(&sc->its_dev_list, newdev, entry); |
