MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,

    r259199, r259484, r259513, r259514, r259516

  The kernel stack guard pages are only below the stack pointer, not above.

  Remove unnecessary double-setting of the thread's onfault state in
  copyinstr().

  Open Firmware mandates that certain cross-references, in particular those
  in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
  since FDT has no concept of ihandles. Have the OF FDT CI module interpret
  queries about ihandles as cross-reference phandles.

  Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
  the right type.

  Rearchitect platform memory map parsing to make it less
  Open Firmware-centric.

  Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
  this file is also slated for future demolition.

  Return the correct IEEE 1275 code for "nextprop".

  Use the common Open Firmware PCI interrupt routing code instead of the
  duplicate version in dev/fdt.

  Configure interrupt sense based on device tree information.

  Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
  internally instead of requiring the caller to allocate it.

1 files changed, 27 insertions, 28 deletions

diff --git a/sys/arm/mv/mv_pci.c b/sys/arm/mv/mv_pci.c
index f708b90..ff12974 100644
--- a/sys/arm/mv/mv_pci.c
+++ b/sys/arm/mv/mv_pci.c
@@ -60,6 +60,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/fdt/fdt_common.h>
 #include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_pci.h>
 #include <dev/ofw/ofw_bus_subr.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
@@ -142,7 +143,7 @@ struct mv_pcib_softc {
 	int		sc_type;
 	int		sc_mode;		/* Endpoint / Root Complex */
 
-	struct fdt_pci_intr	sc_intr_info;
+	struct ofw_bus_iinfo	sc_pci_iinfo;
 };
 
 /* Local forward prototypes */
@@ -155,7 +156,6 @@ static void mv_pcib_hw_cfgwrite(struct mv_pcib_softc *, u_int, u_int,
 static int mv_pcib_init(struct mv_pcib_softc *, int, int);
 static int mv_pcib_init_all_bars(struct mv_pcib_softc *, int, int, int, int);
 static void mv_pcib_init_bridge(struct mv_pcib_softc *, int, int, int);
-static int mv_pcib_intr_info(phandle_t, struct mv_pcib_softc *);
 static inline void pcib_write_irq_mask(struct mv_pcib_softc *, uint32_t);
 static void mv_pcib_enable(struct mv_pcib_softc *, uint32_t);
 static int mv_pcib_mem_init(struct mv_pcib_softc *);
@@ -243,8 +243,8 @@ mv_pcib_probe(device_t self)
 	if (!fdt_is_type(node, "pci"))
 		return (ENXIO);
 
-	if (!(fdt_is_compatible(node, "mrvl,pcie") ||
-	    fdt_is_compatible(node, "mrvl,pci")))
+	if (!(ofw_bus_is_compatible(self, "mrvl,pcie") ||
+	    ofw_bus_is_compatible(self, "mrvl,pci")))
 		return (ENXIO);
 
 	device_set_desc(self, "Marvell Integrated PCI/PCI-E Controller");
@@ -299,11 +299,8 @@ mv_pcib_attach(device_t self)
 	/*
 	 * Get PCI interrupt info.
 	 */
-	if ((sc->sc_mode == MV_MODE_ROOT) &&
-	    (mv_pcib_intr_info(node, sc) != 0)) {
-		device_printf(self, "could not retrieve interrupt info\n");
-		return (ENXIO);
-	}
+	if (sc->sc_mode == MV_MODE_ROOT)
+		ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(pcell_t));
 
 	/*
 	 * Configure decode windows for PCI(E) access.
@@ -881,19 +878,32 @@ mv_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
 }
 
 static int
-mv_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
+mv_pcib_route_interrupt(device_t bus, device_t dev, int pin)
 {
 	struct mv_pcib_softc *sc;
-	int err, interrupt;
+	struct ofw_pci_register reg;
+	uint32_t pintr, mintr;
+	phandle_t iparent;
+
+	sc = device_get_softc(bus);
+	pintr = pin;
+
+	/* Fabricate imap information in case this isn't an OFW device */
+	bzero(&reg, sizeof(reg));
+	reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
+	    (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
+	    (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);
 
-	sc = device_get_softc(pcib);
+	if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, &reg,
+	    sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr),
+	    &iparent))
+		return (ofw_bus_map_intr(dev, iparent, mintr));
 
-	err = fdt_pci_route_intr(pci_get_bus(dev), pci_get_slot(dev),
-	    pci_get_function(dev), pin, &sc->sc_intr_info, &interrupt);
-	if (err == 0)
-		return (interrupt);
+	/* Maybe it's a real interrupt, not an intpin */
+	if (pin > 4)
+		return (pin);
 
-	device_printf(pcib, "could not route pin %d for device %d.%d\n",
+	device_printf(bus, "could not route pin %d for device %d.%d\n",
 	    pin, pci_get_slot(dev), pci_get_function(dev));
 	return (PCI_INVALID_IRQ);
 }
@@ -938,17 +948,6 @@ mv_pcib_decode_win(phandle_t node, struct mv_pcib_softc *sc)
 	return (0);
 }
 
-static int
-mv_pcib_intr_info(phandle_t node, struct mv_pcib_softc *sc)
-{
-	int error;
-
-	if ((error = fdt_pci_intr_info(node, &sc->sc_intr_info)) != 0)
-		return (error);
-
-	return (0);
-}
-
 #if defined(SOC_MV_ARMADAXP)
 static int
 mv_pcib_map_msi(device_t dev, device_t child, int irq, uint64_t *addr,