diff options
author | raj <raj@FreeBSD.org> | 2008-11-19 11:30:44 +0000 |
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committer | raj <raj@FreeBSD.org> | 2008-11-19 11:30:44 +0000 |
commit | d985db3ad549f77ae4a6045ec7d3c94835224941 (patch) | |
tree | 40bce8269da4ed443cd6bad5034b192458fa2483 /sys/arm/mv/kirkwood | |
parent | 815d52c5df6a76286604478e5223d2f2c87b2c04 (diff) | |
download | FreeBSD-src-d985db3ad549f77ae4a6045ec7d3c94835224941.zip FreeBSD-src-d985db3ad549f77ae4a6045ec7d3c94835224941.tar.gz |
PCI/PCI-Express support for Marvell systems.
Obtained from: Marvell, Semihalf
Diffstat (limited to 'sys/arm/mv/kirkwood')
-rw-r--r-- | sys/arm/mv/kirkwood/db88f6xxx.c | 7 | ||||
-rw-r--r-- | sys/arm/mv/kirkwood/kirkwood.c | 25 |
2 files changed, 13 insertions, 19 deletions
diff --git a/sys/arm/mv/kirkwood/db88f6xxx.c b/sys/arm/mv/kirkwood/db88f6xxx.c index 8db9258..16736b0 100644 --- a/sys/arm/mv/kirkwood/db88f6xxx.c +++ b/sys/arm/mv/kirkwood/db88f6xxx.c @@ -57,7 +57,10 @@ __FBSDID("$FreeBSD$"); * virtual_avail - 0xefff_ffff : KVA (virtual_avail is typically < 0xc0a0_0000) * 0xf000_0000 - 0xf0ff_ffff : no-cache allocation area (16MB) * 0xf100_0000 - 0xf10f_ffff : SoC integrated devices registers range (1MB) - * 0xf110_0000 - 0xfffe_ffff : PCIE (MEM+IO) outbound windows (~238MB) + * 0xf110_0000 - 0xf11f_ffff : PCI-Express I/O space (1MB) + * 0xf120_0000 - 0xf12f_ffff : unused (1MB) + * 0xf130_0000 - 0xf52f_ffff : PCI-Express memory space (64MB) + * 0xf930_0000 - 0xfffe_ffff : unused (~172MB) * 0xffff_0000 - 0xffff_0fff : 'high' vectors page (4KB) * 0xffff_1000 - 0xffff_1fff : ARM_TP_ADDRESS/RAS page (4KB) * 0xffff_2000 - 0xffff_ffff : unused (~55KB) @@ -120,5 +123,5 @@ platform_identify(void *dummy) SYSINIT(platform_identify, SI_SUB_CPU, SI_ORDER_SECOND, platform_identify, NULL); /* - * TODO routine setting GPIO/MPP pins + * TODO routine setting GPIO/MPP pins */ diff --git a/sys/arm/mv/kirkwood/kirkwood.c b/sys/arm/mv/kirkwood/kirkwood.c index 416c141..0ba34aa 100644 --- a/sys/arm/mv/kirkwood/kirkwood.c +++ b/sys/arm/mv/kirkwood/kirkwood.c @@ -98,22 +98,19 @@ struct obio_device obio_devices[] = { { -1 }, { -1 }, CPU_PM_CTRL_NONE }, - { "pcib", MV_PCIE_BASE, MV_PCIE_SIZE, - { MV_INT_PEX0_ERR, -1 }, - { -1 }, - CPU_PM_CTRL_PEX0 - }, { NULL, 0, 0, { 0 }, { 0 }, 0 } }; -#if 0 -const struct mv_pci_info pci_info[] = { - { 1, MV_PCIE_IO_BASE, MV_PCIE_IO_SIZE, - MV_PCIE_MEM_BASE, MV_PCIE_MEM_SIZE, +const struct obio_pci mv_pci_info[] = { + { MV_TYPE_PCIE, + MV_PCIE_BASE, MV_PCIE_SIZE, + MV_PCIE_IO_BASE, MV_PCIE_IO_SIZE, 4, 0xE0, + MV_PCIE_MEM_BASE, MV_PCIE_MEM_SIZE, 4, 0xE8, NULL, MV_INT_PEX0 - } + }, + + { 0, 0, 0 } }; -#endif struct resource_spec mv_gpio_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, @@ -139,12 +136,6 @@ struct resource_spec mv_xor_spec[] = { }; const struct decode_win cpu_win_tbl[] = { - /* PCIE IO */ - { 4, 0xE0, MV_PCIE_IO_PHYS_BASE, MV_PCIE_IO_SIZE, -1 }, - - /* PCIE MEM */ - { 4, 0xE8, MV_PCIE_MEM_PHYS_BASE, MV_PCIE_MEM_SIZE, -1 }, - /* Device bus BOOT */ { 1, 0x0f, MV_DEV_BOOT_PHYS_BASE, MV_DEV_BOOT_SIZE, -1 }, |