MFC r257170, r257171, r257172, r257240, r257278, r257279, r257280, r257281,

    r257282, r257332

  Wait for DesignWare UART transfers completion before accessing line control

  Enable UART busy detection handling for Armada XP - based board

  Enable SATA interface on Armada XP
  Run mvs SATA driver on Armada XP instead of old mv_sata

  Retire arm_remap_nocache() and the data and constants associated with it.

  Remove hard-coded mappings related to Armada XP support

  Fix-up DTB for Armada XP registers' base according to the actual settings

  Change Armada XP kernel load address to the u-boot's end address

  Remove not working and deprecated PJ4Bv6 support

  Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU

  Add missing ARMv6 CPU functions to ARM Makefile

1 files changed, 6 insertions, 6 deletions

diff --git a/sys/arm/mv/armadaxp/std.armadaxp b/sys/arm/mv/armadaxp/std.armadaxp
index bf2a5f6..d731ad3 100644
--- a/sys/arm/mv/armadaxp/std.armadaxp
+++ b/sys/arm/mv/armadaxp/std.armadaxp
@@ -1,16 +1,16 @@
 # $FreeBSD$
 
-# kernel gets loaded at 0x00f00000 by the loader, but runs at virtual address
-# 0xc0f00000.  RAM starts at 0.  We put the pagetable at a reasonable place
+# kernel gets loaded at 0x00200000 by the loader, but runs at virtual address
+# 0xc0200000.  RAM starts at 0.  We put the pagetable at a reasonable place
 # in memory, but may need to bounce it higher if there's a problem with this.
 # We could paper over this by loading the kernel at 0xc0000000 virtual, but
 # that leads to other complications, so we'll just reclaim the lower region of
 # ram after we're loaded.  Put the page tables for startup at 1MB.
-makeoptions	KERNPHYSADDR=0x00f00000
-makeoptions	KERNVIRTADDR=0xc0f00000
+makeoptions	KERNPHYSADDR=0x00200000
+makeoptions	KERNVIRTADDR=0xc0200000
 
-options		KERNPHYSADDR=0x00f00000
-options		KERNVIRTADDR=0xc0f00000
+options		KERNPHYSADDR=0x00200000
+options		KERNVIRTADDR=0xc0200000
 options		PHYSADDR=0x00000000
 options		STARTUP_PAGETABLE_ADDR=0x00100000