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author | raj <raj@FreeBSD.org> | 2011-12-15 12:14:15 +0000 |
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committer | raj <raj@FreeBSD.org> | 2011-12-15 12:14:15 +0000 |
commit | b9a8b564569b771ddce6ac2561a71f78356fa2a5 (patch) | |
tree | f525eeed9b75ce44eefd8bf7d149f28393ccb7a9 /sys/arm/include | |
parent | 25d272532cc02718e3f99cd94fd3e3fe7d78194e (diff) | |
download | FreeBSD-src-b9a8b564569b771ddce6ac2561a71f78356fa2a5.zip FreeBSD-src-b9a8b564569b771ddce6ac2561a71f78356fa2a5.tar.gz |
ARM pmap fixes:
- Write Buffers have to be drained after write to Page Table even if caches
are in write-through mode.
- Make sure to sync PTE in pmap_zero_page_generic().
Submitted by: Michal Mazur
Reviewed by: cognet
Obtained from: Semihalf
MFC after: 1 month
Diffstat (limited to 'sys/arm/include')
-rw-r--r-- | sys/arm/include/pmap.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/sys/arm/include/pmap.h b/sys/arm/include/pmap.h index 3d63432..5f499a1 100644 --- a/sys/arm/include/pmap.h +++ b/sys/arm/include/pmap.h @@ -382,7 +382,8 @@ do { \ if (PMAP_NEEDS_PTE_SYNC) { \ cpu_dcache_wb_range((vm_offset_t)(pte), sizeof(pt_entry_t));\ cpu_l2cache_wb_range((vm_offset_t)(pte), sizeof(pt_entry_t));\ - }\ + } else \ + cpu_drain_writebuf(); \ } while (/*CONSTCOND*/0) #define PTE_SYNC_RANGE(pte, cnt) \ @@ -392,7 +393,8 @@ do { \ (cnt) << 2); /* * sizeof(pt_entry_t) */ \ cpu_l2cache_wb_range((vm_offset_t)(pte), \ (cnt) << 2); /* * sizeof(pt_entry_t) */ \ - } \ + } else \ + cpu_drain_writebuf(); \ } while (/*CONSTCOND*/0) extern pt_entry_t pte_l1_s_cache_mode; |