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author | ian <ian@FreeBSD.org> | 2014-05-17 23:03:04 +0000 |
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committer | ian <ian@FreeBSD.org> | 2014-05-17 23:03:04 +0000 |
commit | 90cd423e938c65630b6717c28e54771110171433 (patch) | |
tree | 7d368d79d2a8d3c61b53057fd7538ff336cb2bcc /sys/arm/include/smp.h | |
parent | e09369915c8e3db15faf2cd0e8fb5636d2b6b43d (diff) | |
download | FreeBSD-src-90cd423e938c65630b6717c28e54771110171433.zip FreeBSD-src-90cd423e938c65630b6717c28e54771110171433.tar.gz |
MFC 265023, 265024, 265036:
There is no difference between IPI_STOP and IPI_STOP_HARD on ARM, so
map them both to the same interrupt number like other arches do.
Flush and invalidate caches on each CPU as part of handling IPI_STOP.
Don't use multiprocessing-extensions instruction on processors that don't
support SMP.
Diffstat (limited to 'sys/arm/include/smp.h')
-rw-r--r-- | sys/arm/include/smp.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/arm/include/smp.h b/sys/arm/include/smp.h index 179882d..6301c9a 100644 --- a/sys/arm/include/smp.h +++ b/sys/arm/include/smp.h @@ -10,7 +10,7 @@ #define IPI_PREEMPT 2 #define IPI_RENDEZVOUS 3 #define IPI_STOP 4 -#define IPI_STOP_HARD 5 +#define IPI_STOP_HARD 4 #define IPI_HARDCLOCK 6 #define IPI_TLB 7 |