Import FreeBSD/arm kernel bits.

It only supports sa1110 (on simics) right now, but xscale support should come
soon.
Some of the initial work has been provided by :
Stephane Potvin <sepotvin at videotron.ca>
Most of this comes from NetBSD.

1 files changed, 83 insertions, 0 deletions

diff --git a/sys/arm/include/intr.h b/sys/arm/include/intr.h
new file mode 100644
index 0000000..30d5e6d
--- /dev/null
+++ b/sys/arm/include/intr.h
@@ -0,0 +1,83 @@
+/* 	$NetBSD: intr.h,v 1.7 2003/06/16 20:01:00 thorpej Exp $	*/
+
+/*
+ * Copyright (c) 1997 Mark Brinicombe.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ *	for the NetBSD Project.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ */
+
+#ifndef _MACHINE_INTR_H_
+#define _MACHINE_INTR_H_
+
+/* Define the various Interrupt Priority Levels */
+
+/* Hardware Interrupt Priority Levels are not mutually exclusive. */
+
+#ifdef CPU_SA1110
+#define IPL_SOFTCLOCK	0
+#define IPL_SOFTNET	1
+#define IPL_BIO		2	/* block I/O */
+#define IPL_NET		3	/* network */
+#define IPL_SOFTSERIAL	4
+#define IPL_TTY		5	/* terminal */
+#define IPL_VM		6	/* memory allocation */
+#define IPL_AUDIO	7	/* audio */
+#define IPL_CLOCK	8	/* clock */
+#define IPL_HIGH	9	/*  */
+#define IPL_SERIAL	10	/* serial */
+#define IPL_NONE	11
+
+#define NIPL		12
+
+#endif
+
+#define	IST_UNUSABLE	-1	/* interrupt cannot be used */
+#define	IST_NONE	0	/* none (dummy) */
+#define	IST_PULSE	1	/* pulsed */
+#define	IST_EDGE	2	/* edge-triggered */
+#define	IST_LEVEL	3	/* level-triggered */
+
+/* Software interrupt priority levels */
+
+#define SOFTIRQ_CLOCK	0
+#define SOFTIRQ_NET	1
+#define SOFTIRQ_SERIAL	2
+
+#define SOFTIRQ_BIT(x)	(1 << x)
+
+#include <machine/psl.h>
+
+void set_splmasks(void);
+void arm_setup_irqhandler(const char *, void (*)(void*), void *, int, int,
+    void **);
+#endif	/* _MACHINE_INTR_H */