diff options
| author | raj <raj@FreeBSD.org> | 2008-10-13 18:59:59 +0000 |
|---|---|---|
| committer | raj <raj@FreeBSD.org> | 2008-10-13 18:59:59 +0000 |
| commit | ea283ed261d3d182bb15ae817873baa1adee3fab (patch) | |
| tree | ec43a57e3a711dde0a4ab12617ae61cb1abffe58 /sys/arm/arm/swtch.S | |
| parent | e725b1fa27cadbe3a6f57fc73839bbfea449a623 (diff) | |
| download | FreeBSD-src-ea283ed261d3d182bb15ae817873baa1adee3fab.zip FreeBSD-src-ea283ed261d3d182bb15ae817873baa1adee3fab.tar.gz | |
Provide L2 cache synchronization (write back + invalidation) on ARM.
Note the cpu_l2cache_wbinv_* routines are no-ops on systems not populated with
L2 caches.
Obtained from: Marvell, Semihalf
Diffstat (limited to 'sys/arm/arm/swtch.S')
| -rw-r--r-- | sys/arm/arm/swtch.S | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/sys/arm/arm/swtch.S b/sys/arm/arm/swtch.S index 8f0f9b2..59c2b63 100644 --- a/sys/arm/arm/swtch.S +++ b/sys/arm/arm/swtch.S @@ -143,6 +143,8 @@ ENTRY(cpu_throw) ldr r9, .Lcpufuncs mov lr, pc ldr pc, [r9, #CF_IDCACHE_WBINV_ALL] + mov lr, pc + ldr pc, [r9, #CF_L2CACHE_WBINV_ALL] ldr r0, [r7, #(PCB_PL1VEC)] ldr r1, [r7, #(PCB_DACR)] /* @@ -172,6 +174,8 @@ ENTRY(cpu_throw) movne r1, #4 movne lr, pc ldrne pc, [r9, #CF_DCACHE_WB_RANGE] + movne lr, pc + ldrne pc, [r9, #CF_L2CACHE_WB_RANGE] #endif /* PMAP_INCLUDE_PTE_SYNC */ /* @@ -328,6 +332,8 @@ ENTRY(cpu_switch) ldr r1, .Lcpufuncs mov lr, pc ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] + mov lr, pc + ldr pc, [r1, #CF_L2CACHE_WBINV_ALL] .Lcs_cache_purge_skipped: /* rem: r6 = lock */ /* rem: r9 = new PCB */ @@ -360,6 +366,8 @@ ENTRY(cpu_switch) mov r1, #4 mov lr, pc ldr pc, [r2, #CF_DCACHE_WB_RANGE] + mov lr, pc + ldr pc, [r2, #CF_L2CACHE_WB_RANGE] .Lcs_same_vector: #endif /* PMAP_INCLUDE_PTE_SYNC */ |
