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| author | ian <ian@FreeBSD.org> | 2014-05-14 16:32:27 +0000 |
|---|---|---|
| committer | ian <ian@FreeBSD.org> | 2014-05-14 16:32:27 +0000 |
| commit | 13afdc288fd9e982249ab19116c195578ff90fa1 (patch) | |
| tree | a7f1a8aa7e8f1518d3c62bbfe659e0a16f4cb25a /sys/arm/arm/locore.S | |
| parent | bb1ce472d77ae881d92bd8dbbc84cf2c24edb5e4 (diff) | |
| download | FreeBSD-src-13afdc288fd9e982249ab19116c195578ff90fa1.zip FreeBSD-src-13afdc288fd9e982249ab19116c195578ff90fa1.tar.gz | |
MFC r257170, r257171, r257172, r257240, r257278, r257279, r257280, r257281,
r257282, r257332
Wait for DesignWare UART transfers completion before accessing line control
Enable UART busy detection handling for Armada XP - based board
Enable SATA interface on Armada XP
Run mvs SATA driver on Armada XP instead of old mv_sata
Retire arm_remap_nocache() and the data and constants associated with it.
Remove hard-coded mappings related to Armada XP support
Fix-up DTB for Armada XP registers' base according to the actual settings
Change Armada XP kernel load address to the u-boot's end address
Remove not working and deprecated PJ4Bv6 support
Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU
Add missing ARMv6 CPU functions to ARM Makefile
Diffstat (limited to 'sys/arm/arm/locore.S')
| -rw-r--r-- | sys/arm/arm/locore.S | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/sys/arm/arm/locore.S b/sys/arm/arm/locore.S index ecd7f53..678f3bf 100644 --- a/sys/arm/arm/locore.S +++ b/sys/arm/arm/locore.S @@ -266,10 +266,6 @@ mmu_init_table: /* map VA 0xc0000000..0xc3ffffff to PA */ MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) MMU_INIT(0x48000000, 0x48000000, 1, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) -#if defined(CPU_MV_PJ4B) - /* map VA 0xf1000000..0xf1100000 to PA 0xd0000000 */ - MMU_INIT(0xf1000000, 0xd0000000, 1, L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW)) -#endif /* CPU_MV_PJ4B */ #endif /* SMP */ .word 0 /* end of table */ #endif |
