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| author | kib <kib@FreeBSD.org> | 2012-01-17 07:23:43 +0000 |
|---|---|---|
| committer | kib <kib@FreeBSD.org> | 2012-01-17 07:23:43 +0000 |
| commit | e94bd75cc576b894958cd5eedcf1d25919af0fd4 (patch) | |
| tree | f87c665d2c8359c120de514dbbc6394b7c613606 /sys/amd64 | |
| parent | 6633d0628b91a64a71e56407ac9accf998056bd2 (diff) | |
| download | FreeBSD-src-e94bd75cc576b894958cd5eedcf1d25919af0fd4.zip FreeBSD-src-e94bd75cc576b894958cd5eedcf1d25919af0fd4.tar.gz | |
Add definitions related to XCR0.
MFC after: 1 week
Diffstat (limited to 'sys/amd64')
| -rw-r--r-- | sys/amd64/include/specialreg.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/sys/amd64/include/specialreg.h b/sys/amd64/include/specialreg.h index 4c50166..7ba5f9f 100644 --- a/sys/amd64/include/specialreg.h +++ b/sys/amd64/include/specialreg.h @@ -66,6 +66,7 @@ #define CR4_PCE 0x00000100 /* Performance monitoring counter enable */ #define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */ #define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */ +#define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */ /* * Bits in AMD64 special registers. EFER is 64 bits wide. @@ -76,6 +77,18 @@ #define EFER_NXE 0x000000800 /* PTE No-Execute bit enable (R/W) */ /* + * Intel Extended Features registers + */ +#define XCR0 0 /* XFEATURE_ENABLED_MASK register */ + +#define XFEATURE_ENABLED_X87 0x00000001 +#define XFEATURE_ENABLED_SSE 0x00000002 +#define XFEATURE_ENABLED_AVX 0x00000004 + +#define XFEATURE_AVX \ + (XFEATURE_ENABLED_X87 | XFEATURE_ENABLED_SSE | XFEATURE_ENABLED_AVX) + +/* * CPUID instruction features register */ #define CPUID_FPU 0x00000001 |
