diff options
| author | dwmalone <dwmalone@FreeBSD.org> | 2002-02-12 21:13:02 +0000 |
|---|---|---|
| committer | dwmalone <dwmalone@FreeBSD.org> | 2002-02-12 21:13:02 +0000 |
| commit | 74fa50920291e1e2cfee6132443e0aed1353396f (patch) | |
| tree | d59147594573bd4db46697e197db220e9cf10513 /sys/amd64 | |
| parent | d48667d57b70b83c9ee1efd42bc506acf8f227d7 (diff) | |
| download | FreeBSD-src-74fa50920291e1e2cfee6132443e0aed1353396f.zip FreeBSD-src-74fa50920291e1e2cfee6132443e0aed1353396f.tar.gz | |
Add an option CPU_ATHLON_SSE_HACK which attempts to enable the SSE
feature bit on newer Athlon CPUs if the BIOS has forgotten to enable
it.
This patch was constructed using some info made available by John
Clemens at http://www.deater.net/john/PavilionN5430.html
Reviewed by: -audit
MFC after: 3 weeks
Diffstat (limited to 'sys/amd64')
| -rw-r--r-- | sys/amd64/amd64/initcpu.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 8a9a2a5..6cd77e3 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -575,6 +575,24 @@ initializecpu(void) init_mendocino(); break; } + } else if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { +#if defined(I686_CPU) && defined(CPU_ATHLON_SSE_HACK) + /* + * Sometimes the BIOS doesn't enable SSE instructions. + * According to AMD document 20734, the mobile + * Duron, the (mobile) Athlon 4 and the Athlon MP + * support SSE. These correspond to cpu_id 0x66X + * or 0x67X. + */ + if ((cpu_feature & CPUID_XMM) == 0 && + ((cpu_id & ~0xf) == 0x660 || + (cpu_id & ~0xf) == 0x670)) { + u_int regs[4]; + wrmsr(0xC0010015, rdmsr(0xC0010015) & ~0x08000); + do_cpuid(1, regs); + cpu_feature = regs[3]; + } +#endif } break; #endif |
