diff options
| author | kato <kato@FreeBSD.org> | 2000-08-31 10:33:06 +0000 |
|---|---|---|
| committer | kato <kato@FreeBSD.org> | 2000-08-31 10:33:06 +0000 |
| commit | 549ed4921cbf2b6e5710d8c14fd6c4f39aa8baac (patch) | |
| tree | 074f9a32f33c9bc04e2dbfd5ddec2fbd5f43e965 /sys/amd64 | |
| parent | c7d77e4693be48e5d6a80023b21ac47381232b42 (diff) | |
| download | FreeBSD-src-549ed4921cbf2b6e5710d8c14fd6c4f39aa8baac.zip FreeBSD-src-549ed4921cbf2b6e5710d8c14fd6c4f39aa8baac.tar.gz | |
Improved Cyrix 486DX supports for NEC PC-98.
- Enable WB cache via CCR2 and CR0.
- Set the need_pre_dma_flush when the CPU_I486_ON_386 option is
defined.
Submitted by: Kaho Toshikazu <kaho@elam.kais.kyoto-u.ac.jp>
Diffstat (limited to 'sys/amd64')
| -rw-r--r-- | sys/amd64/amd64/initcpu.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 37ab866..be86c65 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -164,6 +164,15 @@ init_cy486dx(void) #ifdef CPU_SUSP_HLT ccr2 |= CCR2_SUSP_HLT; #endif + +#ifdef PC98 + /* Enables WB cache interface pin and Lock NW bit in CR0. */ + ccr2 |= CCR2_WB | CCR2_LOCK_NW; + /* Unlock NW bit in CR0. */ + write_cyrix_reg(CCR2, ccr2 & ~CCR2_LOCK_NW); + load_cr0((rcr0() & ~CR0_CD) | CR0_NW); /* CD = 0, NW = 1 */ +#endif + write_cyrix_reg(CCR2, ccr2); write_eflags(eflags); } @@ -561,6 +570,12 @@ initializecpu(void) case CPU_M1SC: need_pre_dma_flush = 1; break; + case CPU_CY486DX: + need_pre_dma_flush = 1; +#ifdef CPU_I486_ON_386 + need_post_dma_flush = 1; +#endif + break; #endif default: break; |
