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author | phk <phk@FreeBSD.org> | 2005-02-06 13:46:39 +0000 |
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committer | phk <phk@FreeBSD.org> | 2005-02-06 13:46:39 +0000 |
commit | 749e4957d99361a55cc80046a119444c1fc36bc7 (patch) | |
tree | b7d7b0f2029f00a02738382ec1c9896806724b5e /sys/amd64/isa | |
parent | cda00ab53db39a6c1352187633c92de5571ec3df (diff) | |
download | FreeBSD-src-749e4957d99361a55cc80046a119444c1fc36bc7.zip FreeBSD-src-749e4957d99361a55cc80046a119444c1fc36bc7.tar.gz |
Since we are quite unlikely to ever face another platform which
uses the i8237 without trying to emulate the PC architecture move
the register definitions for the i8237 chip into the central include
file for the chip, except for the PC98 case which is magic.
Add new isa_dmatc() function which tells us as cheaply as possible
if the terminal count has been reached for a given channel.
Diffstat (limited to 'sys/amd64/isa')
-rw-r--r-- | sys/amd64/isa/isa_dma.c | 29 |
1 files changed, 13 insertions, 16 deletions
diff --git a/sys/amd64/isa/isa_dma.c b/sys/amd64/isa/isa_dma.c index 9bd5d01..8404df5 100644 --- a/sys/amd64/isa/isa_dma.c +++ b/sys/amd64/isa/isa_dma.c @@ -61,22 +61,6 @@ __FBSDID("$FreeBSD$"); #include <dev/ic/i8237.h> #include <isa/isavar.h> -/* -** Register definitions for DMA controller 1 (channels 0..3): -*/ -#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ -#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ -#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ -#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ - -/* -** Register definitions for DMA controller 2 (channels 4..7): -*/ -#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ -#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ -#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ -#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ - #define ISARAM_END 0x1000000 static int isa_dmarangecheck(caddr_t va, u_int length, int chan); @@ -489,6 +473,19 @@ isa_dmastatus(int chan) } /* + * Reached terminal count yet ? + */ +int +isa_dmatc(int chan) +{ + + if (chan < 4) + return(inb(DMA1_STATUS) & (1 << chan)); + else + return(inb(DMA2_STATUS) & (1 << (chan & 3))); +} + +/* * Stop a DMA transfer currently in progress. */ int |