diff options
author | jhb <jhb@FreeBSD.org> | 2000-10-05 23:09:57 +0000 |
---|---|---|
committer | jhb <jhb@FreeBSD.org> | 2000-10-05 23:09:57 +0000 |
commit | 71938e9fcdc7dcdcee180aaf1693bdfbc2f62749 (patch) | |
tree | f79e43496c9e52b9fb7344402240cb467ffe42b4 /sys/amd64/isa | |
parent | d3d06a3e7cf8a76f1ff2e19d172e10e60b30aed5 (diff) | |
download | FreeBSD-src-71938e9fcdc7dcdcee180aaf1693bdfbc2f62749.zip FreeBSD-src-71938e9fcdc7dcdcee180aaf1693bdfbc2f62749.tar.gz |
- Heavyweight interrupt threads on the alpha for device I/O interrupts.
- Make softinterrupts (SWI's) almost completely MI, and divorce them
completely from the x86 hardware interrupt code.
- The ihandlers array is now gone. Instead, there is a MI shandlers array
that just contains SWI handlers.
- Most of the former machine/ipl.h files have moved to a new sys/ipl.h.
- Stub out all the spl*() functions on all architectures.
Submitted by: dfr
Diffstat (limited to 'sys/amd64/isa')
-rw-r--r-- | sys/amd64/isa/atpic_vector.S | 13 | ||||
-rw-r--r-- | sys/amd64/isa/clock.c | 6 | ||||
-rw-r--r-- | sys/amd64/isa/icu_vector.S | 13 | ||||
-rw-r--r-- | sys/amd64/isa/icu_vector.s | 13 | ||||
-rw-r--r-- | sys/amd64/isa/intr_machdep.c | 11 | ||||
-rw-r--r-- | sys/amd64/isa/intr_machdep.h | 2 | ||||
-rw-r--r-- | sys/amd64/isa/ithread.c | 166 | ||||
-rw-r--r-- | sys/amd64/isa/nmi.c | 11 | ||||
-rw-r--r-- | sys/amd64/isa/npx.c | 2 |
9 files changed, 19 insertions, 218 deletions
diff --git a/sys/amd64/isa/atpic_vector.S b/sys/amd64/isa/atpic_vector.S index d2b88bf..0a89492 100644 --- a/sys/amd64/isa/atpic_vector.S +++ b/sys/amd64/isa/atpic_vector.S @@ -211,16 +211,3 @@ MCOUNT_LABEL(bintr) INTR(15,intr15, IO_ICU2, ENABLE_ICU1_AND_2, ah,) MCOUNT_LABEL(eintr) - - .data - .globl _ihandlers -_ihandlers: /* addresses of interrupt handlers */ - /* actually resumption addresses for HWI's */ - .long Xresume0, Xresume1, Xresume2, Xresume3 - .long Xresume4, Xresume5, Xresume6, Xresume7 - .long Xresume8, Xresume9, Xresume10, Xresume11 - .long Xresume12, Xresume13, Xresume14, Xresume15 - .long _swi_null, swi_net, _swi_null, _swi_null - .long _swi_vm, _swi_null, _softclock - - .text diff --git a/sys/amd64/isa/clock.c b/sys/amd64/isa/clock.c index 0e2c098..0e630d9 100644 --- a/sys/amd64/isa/clock.c +++ b/sys/amd64/isa/clock.c @@ -130,9 +130,7 @@ static void setup_8254_mixed_mode __P((void)); int adjkerntz; /* local offset from GMT in seconds */ int clkintr_pending; int disable_rtc_set; /* disable resettodr() if != 0 */ -volatile u_int idelayed; int statclock_disable; -u_int stat_imask = SWI_LOW_MASK; #ifndef TIMER_FREQ #define TIMER_FREQ 1193182 #endif @@ -143,9 +141,6 @@ int tsc_is_broken; int wall_cmos_clock; /* wall CMOS clock assumed if != 0 */ static int beeping = 0; -#if 0 -static u_int clk_imask = HWI_MASK | SWI_MASK; -#endif static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31}; static u_int hardclock_max_count; static u_int32_t i8254_lastcount; @@ -1005,7 +1000,6 @@ cpu_initclocks() * flag which would normally cause the RTC to generate * interrupts. */ - stat_imask = HWI_MASK | SWI_MASK; rtc_statusb = RTCSB_24HR; } else { /* Setting stathz to nonzero early helps avoid races. */ diff --git a/sys/amd64/isa/icu_vector.S b/sys/amd64/isa/icu_vector.S index d2b88bf..0a89492 100644 --- a/sys/amd64/isa/icu_vector.S +++ b/sys/amd64/isa/icu_vector.S @@ -211,16 +211,3 @@ MCOUNT_LABEL(bintr) INTR(15,intr15, IO_ICU2, ENABLE_ICU1_AND_2, ah,) MCOUNT_LABEL(eintr) - - .data - .globl _ihandlers -_ihandlers: /* addresses of interrupt handlers */ - /* actually resumption addresses for HWI's */ - .long Xresume0, Xresume1, Xresume2, Xresume3 - .long Xresume4, Xresume5, Xresume6, Xresume7 - .long Xresume8, Xresume9, Xresume10, Xresume11 - .long Xresume12, Xresume13, Xresume14, Xresume15 - .long _swi_null, swi_net, _swi_null, _swi_null - .long _swi_vm, _swi_null, _softclock - - .text diff --git a/sys/amd64/isa/icu_vector.s b/sys/amd64/isa/icu_vector.s index d2b88bf..0a89492 100644 --- a/sys/amd64/isa/icu_vector.s +++ b/sys/amd64/isa/icu_vector.s @@ -211,16 +211,3 @@ MCOUNT_LABEL(bintr) INTR(15,intr15, IO_ICU2, ENABLE_ICU1_AND_2, ah,) MCOUNT_LABEL(eintr) - - .data - .globl _ihandlers -_ihandlers: /* addresses of interrupt handlers */ - /* actually resumption addresses for HWI's */ - .long Xresume0, Xresume1, Xresume2, Xresume3 - .long Xresume4, Xresume5, Xresume6, Xresume7 - .long Xresume8, Xresume9, Xresume10, Xresume11 - .long Xresume12, Xresume13, Xresume14, Xresume15 - .long _swi_null, swi_net, _swi_null, _swi_null - .long _swi_vm, _swi_null, _softclock - - .text diff --git a/sys/amd64/isa/intr_machdep.c b/sys/amd64/isa/intr_machdep.c index 4506c05..a8d701b 100644 --- a/sys/amd64/isa/intr_machdep.c +++ b/sys/amd64/isa/intr_machdep.c @@ -90,13 +90,12 @@ #endif /* - * Per-interrupt data. We consider the soft interrupt to be a special - * case, so these arrays have NHWI + NSWI entries, not ICU_LEN. + * Per-interrupt data. */ -u_long *intr_countp[NHWI + NSWI]; /* pointers to interrupt counters */ -driver_intr_t *intr_handler[NHWI + NSWI]; /* first level interrupt handler */ -struct ithd *ithds[NHWI + NSWI]; /* real interrupt handler */ -void *intr_unit[NHWI + NSWI]; +u_long *intr_countp[ICU_LEN]; /* pointers to interrupt counters */ +driver_intr_t *intr_handler[ICU_LEN]; /* first level interrupt handler */ +struct ithd *ithds[ICU_LEN]; /* real interrupt handler */ +void *intr_unit[ICU_LEN]; static inthand_t *fastintr[ICU_LEN] = { &IDTVEC(fastintr0), &IDTVEC(fastintr1), diff --git a/sys/amd64/isa/intr_machdep.h b/sys/amd64/isa/intr_machdep.h index 5d9d9d2..999df15 100644 --- a/sys/amd64/isa/intr_machdep.h +++ b/sys/amd64/isa/intr_machdep.h @@ -214,8 +214,6 @@ int icu_setup __P((int intr, driver_intr_t *func, void *arg, int flags)); int icu_unset __P((int intr, driver_intr_t *handler)); -intrmask_t splq __P((intrmask_t mask)); - /* * WARNING: These are internal functions and not to be used by device drivers! * They are subject to change without notice. diff --git a/sys/amd64/isa/ithread.c b/sys/amd64/isa/ithread.c index f8326ea..b2a98a2 100644 --- a/sys/amd64/isa/ithread.c +++ b/sys/amd64/isa/ithread.c @@ -87,15 +87,9 @@ #include <machine/mutex.h> #include <sys/ktr.h> #include <machine/cpu.h> -#if 0 -#include <ddb/ddb.h> -#endif -u_long softintrcnt [NSWI]; static u_int straycount[NHWI]; -SYSINIT(start_softintr, SI_SUB_SOFTINTR, SI_ORDER_FIRST, start_softintr, NULL) - #define MAX_STRAY_LOG 5 /* @@ -115,8 +109,7 @@ sched_ithd(void *cookie) * argument for counting hardware interrupts when they're * processed too. */ - if (irq < NHWI) /* real interrupt, */ - atomic_add_long(intr_countp[irq], 1); /* one more for this IRQ */ + atomic_add_long(intr_countp[irq], 1); /* one more for this IRQ */ atomic_add_int(&cnt.v_intr, 1); /* one more global interrupt */ /* @@ -124,47 +117,19 @@ sched_ithd(void *cookie) * this IRQ, log it as a stray interrupt. */ if (ir == NULL || ir->it_proc == NULL) { - if (irq < NHWI) { - if (straycount[irq] < MAX_STRAY_LOG) { - printf("stray irq %d\n", irq); - if (++straycount[irq] == MAX_STRAY_LOG) - printf("got %d stray irq %d's: " - "not logging anymore\n", - MAX_STRAY_LOG, irq); - } - return; + if (straycount[irq] < MAX_STRAY_LOG) { + printf("stray irq %d\n", irq); + if (++straycount[irq] == MAX_STRAY_LOG) + printf( + "got %d stray irq %d's: not logging anymore\n", + MAX_STRAY_LOG, irq); } - panic("sched_ithd: ithds[%d] == NULL", irq); + return; } CTR3(KTR_INTR, "sched_ithd pid %d(%s) need=%d", ir->it_proc->p_pid, ir->it_proc->p_comm, ir->it_need); -#if 0 - /* - * If we are in the debugger, we can't use interrupt threads to - * process interrupts since the threads are scheduled. Instead, - * call the interrupt handlers directly. This should be able to - * go away once we have light-weight interrupt handlers. - */ - if (db_active) { - struct intrec *ih; /* and our interrupt handler chain */ -#if 0 - membar_unlock(); /* push out "it_need=0" */ -#endif - for (ih = ir->it_ih; ih != NULL; ih = ih->next) { - if ((ih->flags & INTR_MPSAFE) == 0) - mtx_enter(&Giant, MTX_DEF); - ih->handler(ih->argument); - if ((ih->flags & INTR_MPSAFE) == 0) - mtx_exit(&Giant, MTX_DEF); - } - - INTREN (1 << ir->irq); /* reset the mask bit */ - return; - } -#endif - /* * Set it_need so that if the thread is already running but close * to done, it will do another go-round. Then get the sched lock @@ -183,18 +148,13 @@ sched_ithd(void *cookie) aston(); } else { -if (irq < NHWI && (irq & 7) != 0) CTR3(KTR_INTR, "sched_ithd %d: it_need %d, state %d", ir->it_proc->p_pid, ir->it_need, ir->it_proc->p_stat ); } mtx_exit(&sched_lock, MTX_SPIN); -#if 0 - aston(); /* ??? check priorities first? */ -#else need_resched(); -#endif } /* @@ -266,113 +226,3 @@ ithd_loop(void *dummy) mtx_exit(&sched_lock, MTX_SPIN); } } - -/* - * Start soft interrupt thread. - */ -void -start_softintr(void *dummy) -{ - int error; - struct proc *p; - struct ithd *softintr; /* descriptor for the "IRQ" */ - struct intrec *idesc; /* descriptor for this handler */ - char *name = "sintr"; /* name for idesc */ - int i; - - if (ithds[SOFTINTR]) { /* we already have a thread */ - printf("start_softintr: already running"); - return; - } - /* first handler for this irq. */ - softintr = malloc(sizeof (struct ithd), M_DEVBUF, M_WAITOK); - if (softintr == NULL) - panic ("Can't create soft interrupt thread"); - bzero(softintr, sizeof(struct ithd)); - softintr->irq = SOFTINTR; - ithds[SOFTINTR] = softintr; - error = kthread_create(intr_soft, NULL, &p, - RFSTOPPED | RFHIGHPID, "softinterrupt"); - if (error) - panic("start_softintr: kthread_create error %d\n", error); - - p->p_rtprio.type = RTP_PRIO_ITHREAD; - p->p_rtprio.prio = PI_SOFT; /* soft interrupt */ - p->p_stat = SWAIT; /* we're idle */ - p->p_flag |= P_NOLOAD; - - /* Put in linkages. */ - softintr->it_proc = p; - p->p_ithd = softintr; /* reverse link */ - - idesc = malloc(sizeof (struct intrec), M_DEVBUF, M_WAITOK); - if (idesc == NULL) - panic ("Can't create soft interrupt thread"); - bzero(idesc, sizeof (struct intrec)); - - idesc->ithd = softintr; - idesc->name = malloc(strlen(name) + 1, M_DEVBUF, M_WAITOK); - if (idesc->name == NULL) - panic ("Can't create soft interrupt thread"); - strcpy(idesc->name, name); - for (i = NHWI; i < NHWI + NSWI; i++) - intr_countp[i] = &softintrcnt [i - NHWI]; -} - -/* - * Software interrupt process code. - */ -void -intr_soft(void *dummy) -{ - int i; - struct ithd *me; /* our thread context */ - - me = curproc->p_ithd; /* point to myself */ - - /* Main loop */ - for (;;) { -#if 0 - CTR3(KTR_INTR, "intr_soft pid %d(%s) need=%d", - me->it_proc->p_pid, me->it_proc->p_comm, - me->it_need); -#endif - - /* - * Service interrupts. If another interrupt arrives - * while we are running, they will set it_need to - * denote that we should make another pass. - */ - me->it_need = 0; - while ((i = ffs(spending))) { - i--; - atomic_add_long(intr_countp[i], 1); - spending &= ~ (1 << i); - mtx_enter(&Giant, MTX_DEF); - if (ihandlers[i] == swi_generic) - swi_dispatcher(i); - else - (ihandlers[i])(); - mtx_exit(&Giant, MTX_DEF); - } - /* - * Processed all our interrupts. Now get the sched - * lock. This may take a while and it_need may get - * set again, so we have to check it again. - */ - mtx_enter(&sched_lock, MTX_SPIN); - if (!me->it_need) { -#if 0 - CTR1(KTR_INTR, "intr_soft pid %d: done", - me->it_proc->p_pid); -#endif - me->it_proc->p_stat = SWAIT; /* we're idle */ - mi_switch(); -#if 0 - CTR1(KTR_INTR, "intr_soft pid %d: resumed", - me->it_proc->p_pid); -#endif - } - mtx_exit(&sched_lock, MTX_SPIN); - } -} diff --git a/sys/amd64/isa/nmi.c b/sys/amd64/isa/nmi.c index 4506c05..a8d701b 100644 --- a/sys/amd64/isa/nmi.c +++ b/sys/amd64/isa/nmi.c @@ -90,13 +90,12 @@ #endif /* - * Per-interrupt data. We consider the soft interrupt to be a special - * case, so these arrays have NHWI + NSWI entries, not ICU_LEN. + * Per-interrupt data. */ -u_long *intr_countp[NHWI + NSWI]; /* pointers to interrupt counters */ -driver_intr_t *intr_handler[NHWI + NSWI]; /* first level interrupt handler */ -struct ithd *ithds[NHWI + NSWI]; /* real interrupt handler */ -void *intr_unit[NHWI + NSWI]; +u_long *intr_countp[ICU_LEN]; /* pointers to interrupt counters */ +driver_intr_t *intr_handler[ICU_LEN]; /* first level interrupt handler */ +struct ithd *ithds[ICU_LEN]; /* real interrupt handler */ +void *intr_unit[ICU_LEN]; static inthand_t *fastintr[ICU_LEN] = { &IDTVEC(fastintr0), &IDTVEC(fastintr1), diff --git a/sys/amd64/isa/npx.c b/sys/amd64/isa/npx.c index 8610e35..e53c54c 100644 --- a/sys/amd64/isa/npx.c +++ b/sys/amd64/isa/npx.c @@ -136,7 +136,7 @@ SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint, "Floatingpoint instructions executed in hardware"); #ifndef SMP -static u_int npx0_imask = SWI_LOW_MASK; +static u_int npx0_imask = 0; static struct gate_descriptor npx_idt_probeintr; static int npx_intrno; static volatile u_int npx_intrs_while_probing; |