diff options
author | jhb <jhb@FreeBSD.org> | 2000-09-13 18:33:25 +0000 |
---|---|---|
committer | jhb <jhb@FreeBSD.org> | 2000-09-13 18:33:25 +0000 |
commit | 7013b8322587468516f271030ba6f1e1e8ad2505 (patch) | |
tree | 094e936b4c4d7213d8c6c9ada2d1b54c3631a970 /sys/amd64/isa | |
parent | 2bef2cffd4590e0d732ee9af20c3fc37217d6b52 (diff) | |
download | FreeBSD-src-7013b8322587468516f271030ba6f1e1e8ad2505.zip FreeBSD-src-7013b8322587468516f271030ba6f1e1e8ad2505.tar.gz |
- Remove the inthand2_t type and use the equivalent driver_intr_t type from
newbus for referencing device interrupt handlers.
- Move the 'struct intrec' type which describes interrupt sources into
sys/interrupt.h instead of making it just be a x86 structure.
- Don't create 'ithd' and 'intrec' typedefs, instead, just use 'struct ithd'
and 'struct intrec'
- Move the code to translate new-bus interrupt flags into an interrupt thread
priority out of the x86 nexus code and into a MI ithread_priority()
function in sys/kern/kern_intr.c.
- Remove now-uneeded x86-specific headers from sys/dev/ata/ata-all.c and
sys/pci/pci_compat.c.
Diffstat (limited to 'sys/amd64/isa')
-rw-r--r-- | sys/amd64/isa/clock.c | 14 | ||||
-rw-r--r-- | sys/amd64/isa/intr_machdep.c | 29 | ||||
-rw-r--r-- | sys/amd64/isa/intr_machdep.h | 29 | ||||
-rw-r--r-- | sys/amd64/isa/ithread.c | 16 | ||||
-rw-r--r-- | sys/amd64/isa/nmi.c | 29 |
5 files changed, 51 insertions, 66 deletions
diff --git a/sys/amd64/isa/clock.c b/sys/amd64/isa/clock.c index 724f3c2..0e2c098 100644 --- a/sys/amd64/isa/clock.c +++ b/sys/amd64/isa/clock.c @@ -1037,7 +1037,7 @@ cpu_initclocks() * 19 July 2000). */ /* Setup the PIC clk handler. The APIC handler is setup later */ - inthand_add("clk", 0, (inthand2_t *)clkintr, NULL, PI_REALTIME, + inthand_add("clk", 0, (driver_intr_t *)clkintr, NULL, PI_REALTIME, INTR_EXCL); INTREN(IRQ0); @@ -1054,8 +1054,8 @@ cpu_initclocks() * XXX - if statclock is disabled, don't attempt the APIC * trial. Not sure this is sane for APIC_IO. */ - inthand_add("clk", apic_8254_intr, (inthand2_t *)clkintr, NULL, - PI_REALTIME, INTR_EXCL); + inthand_add("clk", apic_8254_intr, (driver_intr_t *)clkintr, + NULL, PI_REALTIME, INTR_EXCL); INTREN(1 << apic_8254_intr); #endif /* APIC_IO */ return; @@ -1075,10 +1075,10 @@ cpu_initclocks() * interrupts. */ clkdesc = inthand_add("clk", apic_8254_intr, - (inthand2_t *)clkintr, NULL, PI_REALTIME, INTR_FAST); + (driver_intr_t *)clkintr, NULL, PI_REALTIME, INTR_FAST); INTREN(1 << apic_8254_intr); - rtcdesc = inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL, + rtcdesc = inthand_add("rtc", 8, (driver_intr_t *)rtcintr, NULL, PI_REALTIME, INTR_FAST); /* XXX */ INTREN(APIC_IRQ8); writertc(RTC_STATUSB, rtc_statusb); @@ -1128,12 +1128,12 @@ cpu_initclocks() } /* Finally, setup the real clock handlers */ - inthand_add("clk", apic_8254_intr, (inthand2_t *)clkintr, NULL, + inthand_add("clk", apic_8254_intr, (driver_intr_t *)clkintr, NULL, PI_REALTIME, INTR_EXCL); INTREN(1 << apic_8254_intr); #endif - inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL, PI_REALTIME, + inthand_add("rtc", 8, (driver_intr_t *)rtcintr, NULL, PI_REALTIME, INTR_EXCL); #ifdef APIC_IO INTREN(APIC_IRQ8); diff --git a/sys/amd64/isa/intr_machdep.c b/sys/amd64/isa/intr_machdep.c index 870760e..4506c05 100644 --- a/sys/amd64/isa/intr_machdep.c +++ b/sys/amd64/isa/intr_machdep.c @@ -42,6 +42,7 @@ #include "isa.h" #include <sys/param.h> +#include <sys/bus.h> #ifndef SMP #include <machine/lock.h> #endif @@ -93,8 +94,8 @@ * case, so these arrays have NHWI + NSWI entries, not ICU_LEN. */ u_long *intr_countp[NHWI + NSWI]; /* pointers to interrupt counters */ -inthand2_t *intr_handler[NHWI + NSWI]; /* first level interrupt handler */ -ithd *ithds[NHWI + NSWI]; /* real interrupt handler */ +driver_intr_t *intr_handler[NHWI + NSWI]; /* first level interrupt handler */ +struct ithd *ithds[NHWI + NSWI]; /* real interrupt handler */ void *intr_unit[NHWI + NSWI]; static inthand_t *fastintr[ICU_LEN] = { @@ -125,7 +126,7 @@ static inthand_t *slowintr[ICU_LEN] = { #endif /* APIC_IO */ }; -static inthand2_t isa_strayintr; +static driver_intr_t isa_strayintr; #ifdef PC98 #define NMI_PARITY 0x04 @@ -284,7 +285,7 @@ isa_defaultirq() /* icu vectors */ for (i = 0; i < ICU_LEN; i++) - icu_unset(i, (inthand2_t *)NULL); + icu_unset(i, (driver_intr_t *)NULL); /* initialize 8259's */ #if NMCA > 0 @@ -431,7 +432,7 @@ found: } int -icu_setup(int intr, inthand2_t *handler, void *arg, int flags) +icu_setup(int intr, driver_intr_t *handler, void *arg, int flags) { #ifdef FAST_HI int select; /* the select register is 8 bits */ @@ -502,7 +503,7 @@ icu_setup(int intr, inthand2_t *handler, void *arg, int flags) int icu_unset(intr, handler) int intr; - inthand2_t *handler; + driver_intr_t *handler; { u_long ef; @@ -530,13 +531,13 @@ icu_unset(intr, handler) return (0); } -intrec * -inthand_add(const char *name, int irq, inthand2_t handler, void *arg, +struct intrec * +inthand_add(const char *name, int irq, driver_intr_t handler, void *arg, int pri, int flags) { - ithd *ithd = ithds[irq]; /* descriptor for the IRQ */ - intrec *head; /* chain of handlers for IRQ */ - intrec *idesc; /* descriptor for this handler */ + struct ithd *ithd = ithds[irq]; /* descriptor for the IRQ */ + struct intrec *head; /* chain of handlers for IRQ */ + struct intrec *idesc; /* descriptor for this handler */ struct proc *p; /* interrupt thread */ int errcode = 0; @@ -669,10 +670,10 @@ inthand_add(const char *name, int irq, inthand2_t handler, void *arg, */ int -inthand_remove(intrec *idesc) +inthand_remove(struct intrec *idesc) { - ithd *ithd; /* descriptor for the IRQ */ - intrec *ih; /* chain of handlers */ + struct ithd *ithd; /* descriptor for the IRQ */ + struct intrec *ih; /* chain of handlers */ if (idesc == NULL) return (-1); diff --git a/sys/amd64/isa/intr_machdep.h b/sys/amd64/isa/intr_machdep.h index 87c97a3..5d9d9d2 100644 --- a/sys/amd64/isa/intr_machdep.h +++ b/sys/amd64/isa/intr_machdep.h @@ -143,10 +143,10 @@ extern char eintrnames[]; /* end of intrnames[] */ extern u_long intrcnt[]; /* counts for for each device and stray */ extern char intrnames[]; /* string table containing device names */ extern u_long *intr_countp[]; /* pointers into intrcnt[] */ -extern inthand2_t *intr_handler[]; /* C entry points of intr handlers */ -extern ithd *ithds[]; +extern driver_intr_t *intr_handler[]; /* C entry points of intr handlers */ +extern struct ithd *ithds[]; extern void *intr_unit[]; /* cookies to pass to intr handlers */ -extern ithd softinterrupt; /* soft interrupt thread */ +extern struct ithd softinterrupt; /* soft interrupt thread */ inthand_t IDTVEC(fastintr0), IDTVEC(fastintr1), @@ -210,34 +210,17 @@ inthand_t void isa_defaultirq __P((void)); int isa_nmi __P((int cd)); -int icu_setup __P((int intr, inthand2_t *func, void *arg, +int icu_setup __P((int intr, driver_intr_t *func, void *arg, int flags)); -int icu_unset __P((int intr, inthand2_t *handler)); +int icu_unset __P((int intr, driver_intr_t *handler)); intrmask_t splq __P((intrmask_t mask)); /* - * Describe a hardware interrupt handler. These structures are - * accessed via the array intreclist, which contains one pointer per - * hardware interrupt. - * - * Multiple interrupt handlers for a specific IRQ can be chained - * together via the 'next' pointer. - */ -typedef struct intrec { - inthand2_t *handler; /* code address of handler */ - void *argument; /* argument to pass to handler */ - enum intr_type flags; /* flag bits (sys/bus.h) */ - char *name; /* name of handler */ - ithd *ithd; /* handler we're connected to */ - struct intrec *next; /* next handler for this irq */ -} intrec; - -/* * WARNING: These are internal functions and not to be used by device drivers! * They are subject to change without notice. */ -struct intrec *inthand_add(const char *name, int irq, inthand2_t handler, +struct intrec *inthand_add(const char *name, int irq, driver_intr_t handler, void *arg, int pri, int flags); int inthand_remove(struct intrec *idesc); void sched_ithd(void *); diff --git a/sys/amd64/isa/ithread.c b/sys/amd64/isa/ithread.c index 9bc66dc..2712353 100644 --- a/sys/amd64/isa/ithread.c +++ b/sys/amd64/isa/ithread.c @@ -36,6 +36,7 @@ #include "isa.h" #include <sys/param.h> +#include <sys/bus.h> #include <sys/rtprio.h> /* change this name XXX */ #ifndef SMP #include <machine/lock.h> @@ -53,7 +54,6 @@ #include <machine/ipl.h> #include <machine/md_var.h> #include <machine/segments.h> -#include <sys/bus.h> #if defined(APIC_IO) #include <machine/smp.h> @@ -103,7 +103,7 @@ void sched_ithd(void *cookie) { int irq = (int) cookie; /* IRQ we're handling */ - ithd *ir = ithds[irq]; /* and the process that does it */ + struct ithd *ir = ithds[irq]; /* and the process that does it */ /* This used to be in icu_vector.s */ /* @@ -127,7 +127,7 @@ sched_ithd(void *cookie) * go away once we have light-weight interrupt handlers. */ if (db_active) { - intrec *ih; /* and our interrupt handler chain */ + struct intrec *ih; /* and our interrupt handler chain */ #if 0 membar_unlock(); /* push out "it_need=0" */ #endif @@ -183,8 +183,8 @@ if (irq < NHWI && (irq & 7) != 0) void ithd_loop(void *dummy) { - ithd *me; /* our thread context */ - intrec *ih; /* and our interrupt handler chain */ + struct ithd *me; /* our thread context */ + struct intrec *ih; /* and our interrupt handler chain */ me = curproc->p_ithd; /* point to myself */ @@ -254,8 +254,8 @@ start_softintr(void *dummy) { int error; struct proc *p; - ithd *softintr; /* descriptor for the "IRQ" */ - intrec *idesc; /* descriptor for this handler */ + struct ithd *softintr; /* descriptor for the "IRQ" */ + struct intrec *idesc; /* descriptor for this handler */ char *name = "sintr"; /* name for idesc */ int i; @@ -304,7 +304,7 @@ void intr_soft(void *dummy) { int i; - ithd *me; /* our thread context */ + struct ithd *me; /* our thread context */ me = curproc->p_ithd; /* point to myself */ diff --git a/sys/amd64/isa/nmi.c b/sys/amd64/isa/nmi.c index 870760e..4506c05 100644 --- a/sys/amd64/isa/nmi.c +++ b/sys/amd64/isa/nmi.c @@ -42,6 +42,7 @@ #include "isa.h" #include <sys/param.h> +#include <sys/bus.h> #ifndef SMP #include <machine/lock.h> #endif @@ -93,8 +94,8 @@ * case, so these arrays have NHWI + NSWI entries, not ICU_LEN. */ u_long *intr_countp[NHWI + NSWI]; /* pointers to interrupt counters */ -inthand2_t *intr_handler[NHWI + NSWI]; /* first level interrupt handler */ -ithd *ithds[NHWI + NSWI]; /* real interrupt handler */ +driver_intr_t *intr_handler[NHWI + NSWI]; /* first level interrupt handler */ +struct ithd *ithds[NHWI + NSWI]; /* real interrupt handler */ void *intr_unit[NHWI + NSWI]; static inthand_t *fastintr[ICU_LEN] = { @@ -125,7 +126,7 @@ static inthand_t *slowintr[ICU_LEN] = { #endif /* APIC_IO */ }; -static inthand2_t isa_strayintr; +static driver_intr_t isa_strayintr; #ifdef PC98 #define NMI_PARITY 0x04 @@ -284,7 +285,7 @@ isa_defaultirq() /* icu vectors */ for (i = 0; i < ICU_LEN; i++) - icu_unset(i, (inthand2_t *)NULL); + icu_unset(i, (driver_intr_t *)NULL); /* initialize 8259's */ #if NMCA > 0 @@ -431,7 +432,7 @@ found: } int -icu_setup(int intr, inthand2_t *handler, void *arg, int flags) +icu_setup(int intr, driver_intr_t *handler, void *arg, int flags) { #ifdef FAST_HI int select; /* the select register is 8 bits */ @@ -502,7 +503,7 @@ icu_setup(int intr, inthand2_t *handler, void *arg, int flags) int icu_unset(intr, handler) int intr; - inthand2_t *handler; + driver_intr_t *handler; { u_long ef; @@ -530,13 +531,13 @@ icu_unset(intr, handler) return (0); } -intrec * -inthand_add(const char *name, int irq, inthand2_t handler, void *arg, +struct intrec * +inthand_add(const char *name, int irq, driver_intr_t handler, void *arg, int pri, int flags) { - ithd *ithd = ithds[irq]; /* descriptor for the IRQ */ - intrec *head; /* chain of handlers for IRQ */ - intrec *idesc; /* descriptor for this handler */ + struct ithd *ithd = ithds[irq]; /* descriptor for the IRQ */ + struct intrec *head; /* chain of handlers for IRQ */ + struct intrec *idesc; /* descriptor for this handler */ struct proc *p; /* interrupt thread */ int errcode = 0; @@ -669,10 +670,10 @@ inthand_add(const char *name, int irq, inthand2_t handler, void *arg, */ int -inthand_remove(intrec *idesc) +inthand_remove(struct intrec *idesc) { - ithd *ithd; /* descriptor for the IRQ */ - intrec *ih; /* chain of handlers */ + struct ithd *ithd; /* descriptor for the IRQ */ + struct intrec *ih; /* chain of handlers */ if (idesc == NULL) return (-1); |