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author | bde <bde@FreeBSD.org> | 2001-10-21 05:56:03 +0000 |
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committer | bde <bde@FreeBSD.org> | 2001-10-21 05:56:03 +0000 |
commit | 23731f7ff266e61bb93845bf634caaf3b09ca709 (patch) | |
tree | 5a0219aed3342720950dced610e79d6133c07891 /sys/amd64/isa/npx.c | |
parent | 86656e80479b9e52a763f32f50851cfd473fa827 (diff) | |
download | FreeBSD-src-23731f7ff266e61bb93845bf634caaf3b09ca709.zip FreeBSD-src-23731f7ff266e61bb93845bf634caaf3b09ca709.tar.gz |
MFpc98: fundamental differences. The magic numbers for the i/o port
and the irq are different for pc98, and are not very well handled (we
use a historical mess of hard-coded values, values from header files
and values from hints).
Diffstat (limited to 'sys/amd64/isa/npx.c')
-rw-r--r-- | sys/amd64/isa/npx.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/sys/amd64/isa/npx.c b/sys/amd64/isa/npx.c index 620356d..1807ba9 100644 --- a/sys/amd64/isa/npx.c +++ b/sys/amd64/isa/npx.c @@ -76,8 +76,12 @@ #ifndef SMP #include <i386/isa/icu.h> +#ifdef PC98 +#include <pc98/pc98/pc98.h> +#else #include <i386/isa/isa.h> #endif +#endif #include <isa/isavar.h> /* @@ -226,7 +230,11 @@ npx_intr(dummy) * The BUSY# latch must be cleared in all cases so that the next * unmasked npx exception causes an interrupt. */ +#ifdef PC98 + outb(0xf8, 0); +#else outb(0xf0, 0); +#endif /* * npxthread is normally non-null here. In that case, schedule an @@ -275,8 +283,13 @@ npx_probe(dev) IO_NPX, IO_NPX, IO_NPXSIZE, RF_ACTIVE); if (ioport_res == NULL) panic("npx: can't get ports"); +#ifdef PC98 + if (resource_int_value("npx", 0, "irq", &irq_num) != 0) + irq_num = 8; +#else if (resource_int_value("npx", 0, "irq", &irq_num) != 0) irq_num = 13; +#endif irq_rid = 0; irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &ioport_rid, irq_num, irq_num, 1, RF_ACTIVE); @@ -291,8 +304,12 @@ npx_probe(dev) * Partially reset the coprocessor, if any. Some BIOS's don't reset * it after a warm boot. */ +#ifdef PC98 + outb(0xf8,0); +#else outb(0xf1, 0); /* full reset on some systems, NOP on others */ outb(0xf0, 0); /* clear BUSY# latch */ +#endif /* * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT * instructions. We must set the CR0_MP bit and use the CR0_TS |