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authorgrehan <grehan@FreeBSD.org>2011-05-14 18:37:24 +0000
committergrehan <grehan@FreeBSD.org>2011-05-14 18:37:24 +0000
commitf15f5629368bc3b043d8dfbe6b60d8261e97874d (patch)
treece17f892c7fd4d20db22d42d40c97d863643bbb0 /sys/amd64/include
parentd45b7f14ae6fa78882fa9ec3be976733ca4767b4 (diff)
downloadFreeBSD-src-f15f5629368bc3b043d8dfbe6b60d8261e97874d.zip
FreeBSD-src-f15f5629368bc3b043d8dfbe6b60d8261e97874d.tar.gz
bhyve import part 2 of 2, guest kernel changes.
This branch is now considered frozen: future bhyve development will take place in a branch off -CURRENT. sys/dev/bvm/bvm_console.c sys/dev/bvm/bvm_dbg.c - simple console driver/gdb debug port used for bringup. supported by user-space bhyve executable sys/conf/options.amd64 sys/amd64/amd64/minidump_machdep.c - allow NKPT to be set in the kernel config file sys/amd64/conf/GENERIC - mptable config options; bhyve user-space executable creates an mptable with number of CPUs, and optional vendor extension - add bvm console/debug - set NKPT to 512 to allow loading of large RAM disks from the loader - include kdb/gdb sys/amd64/amd64/local_apic.c sys/amd64/amd64/apic_vector.S sys/amd64/include/specialreg.h - if x2apic mode available, use MSRs to access the local APIC, otherwise fall back to 'classic' MMIO mode sys/amd64/amd64/mp_machdep.c - support AP spinup on CPU models that don't have real-mode support by overwriting the real-mode page with a message that supplies the bhyve user-space executable with enough information to start the AP directly in 64-bit mode. sys/amd64/amd64/vm_machdep.c - insert pause statements into cpu shutdown busy-wait loops sys/dev/blackhole/blackhole.c sys/modules/blackhole/Makefile - boot-time loadable module that claims all PCI bus/slot/funcs specified in an env var that are to be used for PCI passthrough sys/amd64/amd64/intr_machdep.c - allow round-robin assignment of device interrupts to CPUs to be disabled from the loader sys/amd64/include/bus.h - convert string ins/outs instructions to loops of individual in/out since bhyve doesn't support these yet sys/kern/subr_bus.c - if the device was no created with a fixed devclass, then remove it's association with the devclass it was associated with during probe. Otherwise, new drivers do not get a chance to probe/attach since the device will stay married to the first driver that it probed successfully but failed to attach. Sponsored by: NetApp, Inc.
Diffstat (limited to 'sys/amd64/include')
-rw-r--r--sys/amd64/include/bus.h60
-rw-r--r--sys/amd64/include/specialreg.h33
2 files changed, 73 insertions, 20 deletions
diff --git a/sys/amd64/include/bus.h b/sys/amd64/include/bus.h
index e25f427..b7f3ab6 100644
--- a/sys/amd64/include/bus.h
+++ b/sys/amd64/include/bus.h
@@ -269,9 +269,13 @@ bus_space_read_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, u_int8_t *addr, size_t count)
{
- if (tag == AMD64_BUS_SPACE_IO)
- insb(bsh + offset, addr, count);
- else {
+ if (tag == AMD64_BUS_SPACE_IO) {
+ while (count > 0) {
+ *addr = inb(bsh + offset);
+ count--;
+ addr++;
+ }
+ } else {
#ifdef __GNUCLIKE_ASM
__asm __volatile(" \n\
cld \n\
@@ -290,9 +294,13 @@ bus_space_read_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, u_int16_t *addr, size_t count)
{
- if (tag == AMD64_BUS_SPACE_IO)
- insw(bsh + offset, addr, count);
- else {
+ if (tag == AMD64_BUS_SPACE_IO) {
+ while (count > 0) {
+ *addr = inw(bsh + offset);
+ count--;
+ addr++;
+ }
+ } else {
#ifdef __GNUCLIKE_ASM
__asm __volatile(" \n\
cld \n\
@@ -311,9 +319,13 @@ bus_space_read_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, u_int32_t *addr, size_t count)
{
- if (tag == AMD64_BUS_SPACE_IO)
- insl(bsh + offset, addr, count);
- else {
+ if (tag == AMD64_BUS_SPACE_IO) {
+ while (count > 0) {
+ *addr = inl(bsh + offset);
+ count--;
+ addr++;
+ }
+ } else {
#ifdef __GNUCLIKE_ASM
__asm __volatile(" \n\
cld \n\
@@ -533,9 +545,13 @@ bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, const u_int8_t *addr, size_t count)
{
- if (tag == AMD64_BUS_SPACE_IO)
- outsb(bsh + offset, addr, count);
- else {
+ if (tag == AMD64_BUS_SPACE_IO) {
+ while (count > 0) {
+ outb(bsh + offset, *addr);
+ addr++;
+ count--;
+ }
+ } else {
#ifdef __GNUCLIKE_ASM
__asm __volatile(" \n\
cld \n\
@@ -554,9 +570,13 @@ bus_space_write_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, const u_int16_t *addr, size_t count)
{
- if (tag == AMD64_BUS_SPACE_IO)
- outsw(bsh + offset, addr, count);
- else {
+ if (tag == AMD64_BUS_SPACE_IO) {
+ while (count > 0) {
+ outw(bsh + offset, *addr);
+ addr++;
+ count--;
+ }
+ } else {
#ifdef __GNUCLIKE_ASM
__asm __volatile(" \n\
cld \n\
@@ -575,9 +595,13 @@ bus_space_write_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, const u_int32_t *addr, size_t count)
{
- if (tag == AMD64_BUS_SPACE_IO)
- outsl(bsh + offset, addr, count);
- else {
+ if (tag == AMD64_BUS_SPACE_IO) {
+ while (count > 0) {
+ outl(bsh + offset, *addr);
+ addr++;
+ count--;
+ }
+ } else {
#ifdef __GNUCLIKE_ASM
__asm __volatile(" \n\
cld \n\
diff --git a/sys/amd64/include/specialreg.h b/sys/amd64/include/specialreg.h
index c95fee0..42653cc 100644
--- a/sys/amd64/include/specialreg.h
+++ b/sys/amd64/include/specialreg.h
@@ -292,12 +292,41 @@
#define MSR_MC4_ADDR 0x412
#define MSR_MC4_MISC 0x413
+/* X2APIC MSRs */
+#define MSR_APIC_ID 0x802
+#define MSR_APIC_VERSION 0x803
+#define MSR_APIC_TPR 0x808
+#define MSR_APIC_EOI 0x80b
+#define MSR_APIC_LDR 0x80d
+#define MSR_APIC_SVR 0x80f
+#define MSR_APIC_ISR0 0x810
+#define MSR_APIC_ISR1 0x811
+#define MSR_APIC_ISR2 0x812
+#define MSR_APIC_ISR3 0x813
+#define MSR_APIC_ISR4 0x814
+#define MSR_APIC_ISR5 0x815
+#define MSR_APIC_ISR6 0x816
+#define MSR_APIC_ISR7 0x817
+#define MSR_APIC_TMR0 0x818
+#define MSR_APIC_IRR0 0x820
+#define MSR_APIC_ESR 0x828
+#define MSR_APIC_ICR 0x830
+#define MSR_APIC_LVT_TIMER 0x832
+#define MSR_APIC_LVT_THERMAL 0x833
+#define MSR_APIC_LVT_PCINT 0x834
+#define MSR_APIC_LVT_LINT0 0x835
+#define MSR_APIC_LVT_LINT1 0x836
+#define MSR_APIC_LVT_ERROR 0x837
+#define MSR_APIC_ICR_TIMER 0x838
+#define MSR_APIC_CCR_TIMER 0x839
+#define MSR_APIC_DCR_TIMER 0x83e
+
/*
* Constants related to MSR's.
*/
-#define APICBASE_RESERVED 0x000006ff
+#define APICBASE_RESERVED 0x000002ff
#define APICBASE_BSP 0x00000100
-#define APICBASE_X2APIC 0x00000400
+#define APICBASE_X2APIC 0x00000400
#define APICBASE_ENABLED 0x00000800
#define APICBASE_ADDRESS 0xfffff000
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