Commit MD parts of a loosely functional AMD64 port. This is based on

a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to
attempt to get a stable base to start from.  There is a lot missing still.
Worth noting:
- The kernel runs at 1GB in order to cheat with the pmap code.  pmap uses
  a variation of the PAE code in order to avoid having to worry about 4
  levels of page tables yet.
- It boots in 64 bit "long mode" with a tiny trampoline embedded in the
  i386 loader.  This simplifies locore.s greatly.
- There are still quite a few fragments of i386-specific code that have
  not been translated yet, and some that I cheated and wrote dumb C
  versions of (bcopy etc).
- It has both int 0x80 for syscalls (but using registers for argument
  passing, as is native on the amd64 ABI), and the 'syscall' instruction
  for syscalls.  int 0x80 preserves all registers, 'syscall' does not.
- I have tried to minimize looking at the NetBSD code, except in a couple
  of places (eg: to find which register they use to replace the trashed
  %rcx register in the syscall instruction).  As a result, there is not a
  lot of similarity.  I did look at NetBSD a few times while debugging to
  get some ideas about what I might have done wrong in my first attempt.

1 files changed, 28 insertions, 30 deletions

diff --git a/sys/amd64/include/tss.h b/sys/amd64/include/tss.h
index fb2e7a5..aa60ba0 100644
--- a/sys/amd64/include/tss.h
+++ b/sys/amd64/include/tss.h
@@ -41,37 +41,35 @@
 #define _MACHINE_TSS_H_ 1
 
 /*
- * Intel 386 Context Data Type
+ * amd64 Context Data Type
+ *
+ * The alignment is pretty messed up here due to reuse of the original 32 bit
+ * fields.  It might be worth trying to set the tss on a +4 byte offset to
+ * make the 64 bit fields aligned in practice.
  */
-
-struct i386tss {
-	int	tss_link;	/* actually 16 bits: top 16 bits must be zero */
-	int	tss_esp0; 	/* kernel stack pointer privilege level 0 */
-	int	tss_ss0;	/* actually 16 bits: top 16 bits must be zero */
-	int	tss_esp1; 	/* kernel stack pointer privilege level 1 */
-	int	tss_ss1;	/* actually 16 bits: top 16 bits must be zero */
-	int	tss_esp2; 	/* kernel stack pointer privilege level 2 */
-	int	tss_ss2;	/* actually 16 bits: top 16 bits must be zero */
-	int	tss_cr3; 	/* page table directory */
-	int	tss_eip; 	/* program counter */
-	int	tss_eflags; 	/* program status longword */
-	int	tss_eax;
-	int	tss_ecx;
-	int	tss_edx;
-	int	tss_ebx;
-	int	tss_esp; 	/* user stack pointer */
-	int	tss_ebp; 	/* user frame pointer */
-	int	tss_esi;
-	int	tss_edi;
-	int	tss_es;		/* actually 16 bits: top 16 bits must be zero */
-	int	tss_cs;		/* actually 16 bits: top 16 bits must be zero */
-	int	tss_ss;		/* actually 16 bits: top 16 bits must be zero */
-	int	tss_ds;		/* actually 16 bits: top 16 bits must be zero */
-	int	tss_fs;		/* actually 16 bits: top 16 bits must be zero */
-	int	tss_gs;		/* actually 16 bits: top 16 bits must be zero */
-	int	tss_ldt;	/* actually 16 bits: top 16 bits must be zero */
-	int	tss_ioopt;	/* options & io offset bitmap: currently zero */
-				/* XXX unimplemented .. i/o permission bitmap */
+struct amd64tss {
+	u_int32_t	tss_rsvd0;
+	u_int64_t	tss_rsp0 __packed; 	/* kernel stack pointer ring 0 */
+	u_int64_t	tss_rsp1 __packed; 	/* kernel stack pointer ring 1 */
+	u_int64_t	tss_rsp2 __packed; 	/* kernel stack pointer ring 2 */
+	u_int32_t	tss_rsvd1;
+	u_int32_t	tss_rsvd2;
+	u_int32_t	tss_rsvd3;
+	u_int64_t	tss_ist1 __packed;	/* Interrupt stack table 1 */
+	u_int64_t	tss_ist2 __packed;	/* Interrupt stack table 2 */
+	u_int64_t	tss_ist3 __packed;	/* Interrupt stack table 3 */
+	u_int64_t	tss_ist4 __packed;	/* Interrupt stack table 4 */
+	u_int64_t	tss_ist5 __packed;	/* Interrupt stack table 5 */
+	u_int64_t	tss_ist6 __packed;	/* Interrupt stack table 6 */
+	u_int64_t	tss_ist7 __packed;	/* Interrupt stack table 7 */
+	u_int32_t	tss_rsvd4;
+	u_int32_t	tss_rsvd5;
+	u_int16_t	tss_rsvd6;
+	u_int16_t	tss_iobase;	/* io bitmap offset */
 };
 
+#ifdef _KERNEL
+extern struct amd64tss common_tss;
+#endif
+
 #endif /* _MACHINE_TSS_H_ */