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authorkib <kib@FreeBSD.org>2013-08-30 07:59:49 +0000
committerkib <kib@FreeBSD.org>2013-08-30 07:59:49 +0000
commita2b5da0090b331918b7db2ece8b9ca5d545d4a6c (patch)
tree04770c540ba8145f9288bad14ac5d4d59ac30c95 /sys/amd64/include/smp.h
parent748f95c68727abdadaf3ea8816cc19784d05411d (diff)
downloadFreeBSD-src-a2b5da0090b331918b7db2ece8b9ca5d545d4a6c.zip
FreeBSD-src-a2b5da0090b331918b7db2ece8b9ca5d545d4a6c.tar.gz
Implement support for the process-context identifiers ('PCID') on
Intel CPUs. The feature tags TLB entries with the Id of the address space and allows to avoid TLB invalidation on the context switch, it is available only in the long mode. In the microbenchmarks, using the PCID decreased latency of the context switches by ~30% on SandyBridge class desktop CPUs, measured with the lat_ctx program from lmbench. If available, use INVPCID instruction when a TLB entry in non-current address space needs to be invalidated. The instruction is typically available on the Haswell. If needed, the use of PCID can be turned off with the vm.pmap.pcid_enabled loader tunable set to 0. The state of the feature is reported by the vm.pmap.pcid_enabled sysctl. The sysctl vm.pmap.pcid_save_cnt reports the number of context switches which avoided invalidating the TLB; compare with the total number of context switches, available as sysctl vm.stats.sys.v_swtch. Sponsored by: The FreeBSD Foundation Reviewed by: alc Tested by: pho, bf
Diffstat (limited to 'sys/amd64/include/smp.h')
-rw-r--r--sys/amd64/include/smp.h15
1 files changed, 9 insertions, 6 deletions
diff --git a/sys/amd64/include/smp.h b/sys/amd64/include/smp.h
index 16d87ea..d6cd476 100644
--- a/sys/amd64/include/smp.h
+++ b/sys/amd64/include/smp.h
@@ -54,6 +54,8 @@ inthand_t
IDTVEC(cpususpend), /* CPU suspends & waits to be resumed */
IDTVEC(rendezvous); /* handle CPU rendezvous */
+struct pmap;
+
/* functions in mp_machdep.c */
void cpu_add(u_int apic_id, char boot_cpu);
void cpustop_handler(void);
@@ -67,13 +69,14 @@ int ipi_nmi_handler(void);
void ipi_selected(cpuset_t cpus, u_int ipi);
u_int mp_bootaddress(u_int);
void smp_cache_flush(void);
-void smp_invlpg(vm_offset_t addr);
-void smp_masked_invlpg(cpuset_t mask, vm_offset_t addr);
-void smp_invlpg_range(vm_offset_t startva, vm_offset_t endva);
-void smp_masked_invlpg_range(cpuset_t mask, vm_offset_t startva,
+void smp_invlpg(struct pmap *pmap, vm_offset_t addr);
+void smp_masked_invlpg(cpuset_t mask, struct pmap *pmap, vm_offset_t addr);
+void smp_invlpg_range(struct pmap *pmap, vm_offset_t startva,
vm_offset_t endva);
-void smp_invltlb(void);
-void smp_masked_invltlb(cpuset_t mask);
+void smp_masked_invlpg_range(cpuset_t mask, struct pmap *pmap,
+ vm_offset_t startva, vm_offset_t endva);
+void smp_invltlb(struct pmap *pmap);
+void smp_masked_invltlb(cpuset_t mask, struct pmap *pmap);
#endif /* !LOCORE */
#endif /* SMP */
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