Add BASIC i386 binary support for the amd64 kernel. This is largely

stolen from the ia64/ia32 code (indeed there was a repocopy), but I've
redone the MD parts and added and fixed a few essential syscalls.  It
is sufficient to run i386 binaries like /bin/ls, /usr/bin/id (dynamic)
and p4.  The ia64 code has not implemented signal delivery, so I had
to do that.

Before you say it, yes, this does need to go in a common place.  But
we're in a freeze at the moment and I didn't want to risk breaking ia64.
I will sort this out after the freeze so that the common code is in a
common place.

On the AMD64 side, this required adding segment selector context switch
support and some other support infrastructure.  The %fs/%gs etc code
is hairy because loading %gs will clobber the kernel's current MSR_GSBASE
setting.  The segment selectors are not used by the kernel, so they're only
changed at context switch time or when changing modes.  This still needs
to be optimized.

Approved by:	re (amd64/* blanket)

1 files changed, 12 insertions, 1 deletions

diff --git a/sys/amd64/include/cpufunc.h b/sys/amd64/include/cpufunc.h
index 1e1df33..21257dd 100644
--- a/sys/amd64/include/cpufunc.h
+++ b/sys/amd64/include/cpufunc.h
@@ -447,7 +447,6 @@ invlpg(u_long addr)
 	__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
 }
 
-/* XXX these are replaced with rdmsr/wrmsr */
 static __inline u_int
 rfs(void)
 {
@@ -465,6 +464,18 @@ rgs(void)
 }
 
 static __inline void
+load_ds(u_int sel)
+{
+	__asm __volatile("movl %0,%%ds" : : "rm" (sel));
+}
+
+static __inline void
+load_es(u_int sel)
+{
+	__asm __volatile("movl %0,%%es" : : "rm" (sel));
+}
+
+static __inline void
 load_fs(u_int sel)
 {
 	__asm __volatile("movl %0,%%fs" : : "rm" (sel));