Resurrect platform.pci_intr_map() and essentially undo the effects of

the interface conversion to platform.pci_intr_route().  I've left the
platform.pci_intr_route() function pointer in place, as well as
alpha_pci_route_interrupt(), but no platform currently implements it.

To work around the removal of alpha_platform_assign_pciintr(cfg);
from the pci probe code, I've hooked in calls to platform.pci_intr_map()
in pcib_read_config (similar to the x86 APIC_IO ifdef in pci_cfgregread)
for every chipset that has a platform which needs it.

While here, I've removed the interupt mapping/routing code from the
AS2x00 platform because its not required (it has never been present in
-stable).

Tested on: UP1000, Miata(GL), XP1000, AS2100, AS500

15 files changed, 206 insertions, 213 deletions

diff --git a/sys/alpha/alpha/dec_1000a.c b/sys/alpha/alpha/dec_1000a.c
index 97edea9..3103f54 100644
--- a/sys/alpha/alpha/dec_1000a.c
+++ b/sys/alpha/alpha/dec_1000a.c
@@ -103,12 +103,12 @@ void dec_1000a_init __P((int));
 static void dec_1000a_cons_init __P((void));
 
 
-static int dec_1000_intr_route __P((device_t, device_t, int));
+static void dec_1000_intr_map __P((void *));
 static void dec_1000_intr_disable __P((int));
 static void dec_1000_intr_enable __P((int));
 static void dec_1000_intr_init __P((void));
 
-static int dec_1000a_intr_route __P((device_t, device_t, int));
+static void dec_1000a_intr_map __P((void *));
 static void dec_1000a_intr_disable __P((int));
 static void dec_1000a_intr_enable __P((int));
 static void dec_1000a_intr_init __P((void));
@@ -156,14 +156,14 @@ dec_1000a_init(int cputype)
 	platform.cons_init = dec_1000a_cons_init;
 	switch (cputype) {
 	case ST_DEC_1000:
-		platform.pci_intr_route = dec_1000_intr_route;
+		platform.pci_intr_map = dec_1000_intr_map;
 		platform.pci_intr_disable = dec_1000_intr_disable;
 		platform.pci_intr_enable = dec_1000_intr_enable;
 		platform.pci_intr_init = dec_1000_intr_init;
 		break;
 
 	default:
-		platform.pci_intr_route = dec_1000a_intr_route;
+		platform.pci_intr_map = dec_1000a_intr_map;
 		platform.pci_intr_disable = dec_1000a_intr_disable;
 		platform.pci_intr_enable = dec_1000a_intr_enable;
 		platform.pci_intr_init = dec_1000a_intr_init;
@@ -236,28 +236,36 @@ dec_1000a_cons_init()
 }
 
 
-static int
-dec_1000_intr_route(bus, dev, pin)
-	device_t bus, dev;
-	int pin;
+static void
+dec_1000_intr_map(arg)
+	void *arg;
 {
-	switch(pci_get_slot(dev)) {
+	pcicfgregs *cfg;
+
+	cfg = (pcicfgregs *)arg;
+	if (cfg->intpin == 0)	/* No IRQ used. */
+		return;
+	if (!(1 <= cfg->intpin && cfg->intpin <= 4))
+		goto bad;
+
+	switch(cfg->slot) {
 	case 6:
-		if (pin != 1)
+		if(cfg->intpin != 1)
 			break;
-		return(0xc);			/* integrated ncr scsi */
+		cfg->intline = 0xc;		/* integrated ncr scsi */
+		return;
+		break;
 	case 11:
 	case 12:
 	case 13:
-		return((pci_get_slot(dev) - 11) * 4 + pin - 1);
+		cfg->intline = (cfg->slot - 11) * 4 + cfg->intpin - 1;
+		return;
 		break;
 	}
-	printf("dec_1000_intr_map: can't map dev %d pin %d\n",
-	       pci_get_slot(dev), pin);
-	return(255);
+bad:	printf("dec_1000_intr_map: can't map dev %d pin %d\n",
+	    cfg->slot, cfg->intpin);
 }
 
-
 /*
  * Read and write the mystery ICU IMR registers
  * on the AlphaServer 1000.
@@ -311,12 +319,11 @@ dec_1000_intr_init()
 #define IMR2IRQ(bn) 	((bn) - 1)
 #define IRQ2IMR(irq) 	((irq) + 1)
 
-
-static int
-dec_1000a_intr_route(bus, dev, pin)
-	device_t bus, dev;
-	int pin;
+static void
+dec_1000a_intr_map(arg)
+	void *arg;
 {
+	pcicfgregs *cfg;
 	int device, imrbit;
 	/*
 	 * Get bit number in mystery ICU imr.
@@ -341,15 +348,23 @@ dec_1000a_intr_route(bus, dev, pin)
 		/* 14  */ IRQSPLIT(8)		/* Corelle */
 	};
 
-	device = pci_get_slot(dev);
-	if (0 <= device && device < sizeof(imrmap) / sizeof(imrmap[0])) {
-		imrbit = imrmap[device][pin - 1];
-		if (imrbit)
-			return(IMR2IRQ(imrbit));
+	cfg = (pcicfgregs *)arg;
+	device = cfg->slot;
+
+	if (cfg->intpin == 0)	/* No IRQ used. */
+		return;
+	if (!(1 <= cfg->intpin && cfg->intpin <= 4))
+		goto bad;
+
+	if (0 <= device && device < sizeof imrmap / sizeof imrmap[0]) {
+		imrbit = imrmap[device][cfg->intpin - 1];
+		if (imrbit) {
+			cfg->intline = IMR2IRQ(imrbit);
+			return;
+		}
 	}
-	printf("dec_1000a_intr_route: can't map dev %d pin %d\n",
-	       device, pin);
-	return(255);
+bad:	printf("dec_1000a_intr_map: can't map dev %d pin %d\n",
+	    device, cfg->intpin);
 }
 
 
diff --git a/sys/alpha/alpha/dec_2100_a50.c b/sys/alpha/alpha/dec_2100_a50.c
index bf34b68..fb09008 100644
--- a/sys/alpha/alpha/dec_2100_a50.c
+++ b/sys/alpha/alpha/dec_2100_a50.c
@@ -58,7 +58,7 @@ static int comcnrate = CONSPEED;
 
 void dec_2100_a50_init __P((void));
 static void dec_2100_a50_cons_init __P((void));
-static int dec_2100_a50_intr_route  __P((device_t, device_t, int));
+static void dec_2100_a50_intr_map  __P((void *));
 void sio_intr_establish __P((int));
 void sio_intr_disestablish __P((int));
 void sio_intr_setup __P((void));
@@ -97,7 +97,7 @@ dec_2100_a50_init()
 
 	platform.iobus = "apecs";
 	platform.cons_init = dec_2100_a50_cons_init;
-	platform.pci_intr_route  = dec_2100_a50_intr_route;
+	platform.pci_intr_map  = dec_2100_a50_intr_map;
 }
 
 /* XXX for forcing comconsole when srm serial console is used */
@@ -158,27 +158,35 @@ dec_2100_a50_cons_init()
 
 #define	SIO_PCIREG_PIRQ_RTCTRL	0x60    /* PIRQ0 Route Control */
 
-int
-dec_2100_a50_intr_route(device_t bus, device_t dev, int pin)
+void
+dec_2100_a50_intr_map(void *arg)
 {
 	u_int8_t pirqline;
 	u_int32_t pirqreg;
 	int pirq;
+	pcicfgregs *cfg;
 
-	pirq = 255;
+	pirq = 0;  /* gcc -Wuninitialized XXX */
+	cfg = (pcicfgregs *)arg;
 
 	/*
 	 * Slot->interrupt translation.  Taken from NetBSD.
 	 */
 
-	switch (pci_get_slot(dev)) {
+	if(cfg->intpin == 0)
+		return;
+
+	if(cfg->intpin > 4)
+		panic("dec_2100_a50_intr_map: bad intpin %d",cfg->intpin);
+
+	switch (cfg->slot) {
 	case 6:					/*  NCR SCSI */
 		pirq = 3;
 		break;
 
 	case 11:				/* slot 1 */
 	case 14:				/* slot 3 */
-		switch(pin) {
+		switch(cfg->intpin) {
 		case 1:
 		case 4:
 			pirq = 0;
@@ -190,12 +198,13 @@ dec_2100_a50_intr_route(device_t bus, device_t dev, int pin)
 			pirq = 1;
 			break;
 		default:
-			panic("dec_2100_a50_intr_map bogus PCI pin %d\n", pin);
+			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
+			    cfg->intpin);
+
 		}
 		break;
-
 	case 12:				/* slot 2 */
-		switch (pin) {
+		switch (cfg->intpin) {
 		case 1:
 		case 4:
 			pirq = 1;
@@ -207,12 +216,14 @@ dec_2100_a50_intr_route(device_t bus, device_t dev, int pin)
 			pirq = 2;
 			break;
 		default:
-			panic("dec_2100_a50_intr_map bogus PCI pin %d\n", pin);
+			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
+			    cfg->intpin);
+
 		};
 		break;
 
 	case 13:				/* slot 3 */
-		switch (pin) {
+		switch (cfg->intpin) {
 		case 1:
 		case 4:
 			pirq = 2;
@@ -226,8 +237,8 @@ dec_2100_a50_intr_route(device_t bus, device_t dev, int pin)
 		};
 		break;
 default:
-		printf("dec_2100_a50_intr_map: weird slot %d\n", 
-		       pci_get_slot(dev));
+		printf("dec_2100_a50_intr_map: weird slot %d\n",
+		    cfg->slot);
 
 		/* return; */
         }
@@ -243,5 +254,5 @@ default:
 	if ((pirqline & 0x80) != 0)
 		panic("bad pirqline %d",pirqline);
 	pirqline &= 0xf;
-	return(pirqline);
+	cfg->intline = pirqline;
 }
diff --git a/sys/alpha/alpha/dec_2100_a500.c b/sys/alpha/alpha/dec_2100_a500.c
index 763fb4b..d14af4e 100644
--- a/sys/alpha/alpha/dec_2100_a500.c
+++ b/sys/alpha/alpha/dec_2100_a500.c
@@ -80,7 +80,6 @@ dec_2100_a500_init(cputype)
 
 	platform.iobus = "t2";
 	platform.cons_init = dec_2100_a500_cons_init;
-	platform.pci_intr_route = t2_intr_route;
 	platform.pci_intr_init = dec_2100_a500_intr_init;
 
 	t2_init();
diff --git a/sys/alpha/alpha/dec_axppci_33.c b/sys/alpha/alpha/dec_axppci_33.c
index 5928807..0888a6c 100644
--- a/sys/alpha/alpha/dec_axppci_33.c
+++ b/sys/alpha/alpha/dec_axppci_33.c
@@ -55,7 +55,7 @@ static int comcnrate = CONSPEED;
 
 void dec_axppci_33_init __P((void));
 static void dec_axppci_33_cons_init __P((void));
-static int dec_axppci_33_intr_route  __P((device_t, device_t, int));
+static void dec_axppci_33_intr_map  __P((void *));
 
 extern int siocnattach __P((int, int));
 extern int siogdbattach __P((int, int));
@@ -93,7 +93,7 @@ dec_axppci_33_init()
 
 	platform.iobus = "lca";
 	platform.cons_init = dec_axppci_33_cons_init;
-	platform.pci_intr_route = dec_axppci_33_intr_route;
+	platform.pci_intr_map = dec_axppci_33_intr_map;
 
 	lca_init();
 
@@ -167,13 +167,16 @@ dec_axppci_33_cons_init()
 
 #define	SIO_PCIREG_PIRQ_RTCTRL	0x60	/* PIRQ0 Route Control */
 
-static int
-dec_axppci_33_intr_route(device_t pcib, device_t dev, int pin)
+void
+dec_axppci_33_intr_map(void *arg)
 {
+	pcicfgregs *cfg;
 	int pirq;
 	u_int32_t pirqreg;
 	u_int8_t pirqline;
 
+	cfg = (pcicfgregs *)arg;
+
 #ifndef DIAGNOSTIC
 	pirq = 0;				/* XXX gcc -Wuninitialized */
 #endif
@@ -182,13 +185,23 @@ dec_axppci_33_intr_route(device_t pcib, device_t dev, int pin)
 	 * Slot->interrupt translation.  Taken from NetBSD.
 	 */
 
-	switch (pci_get_slot(dev)) {
+	if (cfg->intpin == 0) {
+		/* No IRQ used. */
+		return;
+	}
+	if (cfg->intpin > 4) {
+		printf("dec_axppci_33_intr_map: bad interrupt pin %d\n",
+		    cfg->intpin);
+		return;
+	}
+
+	switch (cfg->slot) {
 	case 6:					/* NCR SCSI */
 		pirq = 3;
 		break;
 
 	case 11:				/* slot 1 */
-		switch (pin) {
+		switch (cfg->intpin) {
 		case 1:
 		case 4:
 			pirq = 0;
@@ -199,11 +212,16 @@ dec_axppci_33_intr_route(device_t pcib, device_t dev, int pin)
 		case 3:
 			pirq = 1;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_axppci_33_intr_map: bogus PCI pin %d\n",
+			    cfg->intpin);
+#endif
 		};
 		break;
 
 	case 12:				/* slot 2 */
-		switch (pin) {
+		switch (cfg->intpin) {
 		case 1:
 		case 4:
 			pirq = 1;
@@ -214,11 +232,16 @@ dec_axppci_33_intr_route(device_t pcib, device_t dev, int pin)
 		case 3:
 			pirq = 2;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_axppci_33_intr_map: bogus PCI pin %d\n",
+			    cfg->intpin);
+#endif
 		};
 		break;
 
 	case 8:				/* slot 3 */
-		switch (pin) {
+		switch (cfg->intpin) {
 		case 1:
 		case 4:
 			pirq = 2;
@@ -229,22 +252,35 @@ dec_axppci_33_intr_route(device_t pcib, device_t dev, int pin)
 		case 3:
 			pirq = 0;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_axppci_33_intr_map bogus: PCI pin %d\n",
+			    cfg->intpin);
+#endif
 		};
 		break;
 
 	default:
-		printf("dec_axppci_33_intr_map: weird slot number %d\n",
-		       pci_get_slot(dev));
-		return(255);
+		printf("dec_axppci_33_intr_map: weird device number %d\n",
+		    cfg->slot);
+		return;
 	}
 
 	pirqreg = lca_pcib_read_config(0, 0, 7, 0,
 				       SIO_PCIREG_PIRQ_RTCTRL, 4);
+#if 0
+	printf("dec_axppci_33_intr_map: device %d pin %c: pirq %d, reg = %x\n",
+		device, '@' + cfg->intpin, pirq, pirqreg);
+#endif
 	pirqline = (pirqreg >> (pirq * 8)) & 0xff;
 	if ((pirqline & 0x80) != 0)
 		panic("bad pirqline %d",pirqline);
 	pirqline &= 0xf;
 
-	return(pirqline);
-}
+#if 0
+	printf("dec_axppci_33_intr_map: device %d pin %c: mapped to line %d\n",
+	    device, '@' + cfg->intpin, pirqline);
+#endif
 
+	cfg->intline = pirqline;
+}
diff --git a/sys/alpha/alpha/dec_eb164.c b/sys/alpha/alpha/dec_eb164.c
index 661c605..fe779aa 100644
--- a/sys/alpha/alpha/dec_eb164.c
+++ b/sys/alpha/alpha/dec_eb164.c
@@ -77,7 +77,7 @@ dec_eb164_init()
 	platform.iobus = "cia";
 	platform.cons_init = dec_eb164_cons_init;
 	platform.pci_intr_init = eb164_intr_init;
-	platform.pci_intr_route = NULL;
+	platform.pci_intr_map = NULL;
 	if (strncmp(platform.model, "Digital AlphaPC 164 ", 20) == 0) {
 		platform.pci_intr_disable = eb164_intr_disable_icsr;
 		platform.pci_intr_enable = eb164_intr_enable_icsr;
diff --git a/sys/alpha/alpha/dec_eb64plus.c b/sys/alpha/alpha/dec_eb64plus.c
index 6fad014..4571457 100644
--- a/sys/alpha/alpha/dec_eb64plus.c
+++ b/sys/alpha/alpha/dec_eb64plus.c
@@ -109,7 +109,7 @@ dec_eb64plus_init()
 	platform.cons_init 		= dec_eb64plus_cons_init;
 	platform.pci_intr_init 		= dec_eb64plus_intr_init;
 	/* SRM handles PCI interrupt mapping */
-	platform.pci_intr_route 	= NULL;	
+	platform.pci_intr_map  		= NULL;	
 	/* see ../pci/pci_eb64plus_intr.s for intr. dis/enable */
 	platform.pci_intr_disable 	= eb64plus_intr_disable;
 	platform.pci_intr_enable 	= eb64plus_intr_enable;
diff --git a/sys/alpha/alpha/dec_kn20aa.c b/sys/alpha/alpha/dec_kn20aa.c
index 49c87a4..2906024 100644
--- a/sys/alpha/alpha/dec_kn20aa.c
+++ b/sys/alpha/alpha/dec_kn20aa.c
@@ -57,7 +57,7 @@ static int comcnrate = CONSPEED;
 void dec_kn20aa_init __P((void));
 static void dec_kn20aa_cons_init __P((void));
 static void dec_kn20aa_intr_init __P((void));
-static int dec_kn20aa_intr_route  __P((device_t, device_t, int));
+static void dec_kn20aa_intr_map  __P((void *));
 static void dec_kn20aa_intr_disable __P((int));
 static void dec_kn20aa_intr_enable __P((int));
 
@@ -92,7 +92,7 @@ dec_kn20aa_init()
 	platform.iobus = "cia";
 	platform.cons_init = dec_kn20aa_cons_init;
 	platform.pci_intr_init  = dec_kn20aa_intr_init;
-	platform.pci_intr_route  = dec_kn20aa_intr_route;
+	platform.pci_intr_map  = dec_kn20aa_intr_map;
 	platform.pci_intr_disable = dec_kn20aa_intr_disable;
 	platform.pci_intr_enable = dec_kn20aa_intr_enable;
 }
@@ -276,11 +276,12 @@ dec_kn20aa_intr_init()
 	dec_kn20aa_intr_enable(31);
 }
 
-static int
-dec_kn20aa_intr_route(device_t pcib, device_t dev, int pin)
+void
+dec_kn20aa_intr_map(void *arg)
 {
-	int intline;
+	pcicfgregs *cfg;
 
+	cfg = (pcicfgregs *)arg;
 	/*
 	 * Slot->interrupt translation.  Appears to work, though it
 	 * may not hold up forever.
@@ -288,46 +289,45 @@ dec_kn20aa_intr_route(device_t pcib, device_t dev, int pin)
 	 * The DEC engineers who did this hardware obviously engaged
 	 * in random drug testing.
 	 */
-	switch (pci_get_slot(dev)) {
+	switch (cfg->slot) {
 	case 11:
 	case 12:
-		intline = ((pci_get_slot(dev) - 11) + 0) * 4;
+		cfg->intline = ((cfg->slot - 11) + 0) * 4;
 		break;
 
 	case 7:
-		intline = 8;
+		cfg->intline = 8;
 		break;
 
 	case 9:
-		intline = 12;
+		cfg->intline = 12;
 		break;
 
 	case 6:				/* 21040 on AlphaStation 500 */
-		intline = 13;
+		cfg->intline = 13;
 		break;
 
 	case 8:
-		intline = 16;
+		cfg->intline = 16;
 		break;
 
 	case 10:			/* 8275EB on AlphaStation 500 */
-		return(255);
+		return;
 
 	default:
-		if (pci_get_bus(dev) == 0) {
+		if(!cfg->bus){
 			printf("dec_kn20aa_intr_map: weird slot %d\n",
-			       pci_get_slot(dev));
-			return(255);
+			    cfg->slot);
+			return;
 		} else {
-			intline = pci_get_slot(dev);
+			cfg->intline = cfg->slot;
 		}
 	}
 
-	intline += pci_get_bus(dev) * 16;
-	if (intline > KN20AA_MAX_IRQ)
-		panic("dec_kn20aa_intr_route: intline too large (%d)\n",
-		      intline);
-	return(intline);
+	cfg->intline += cfg->bus*16;
+	if (cfg->intline > KN20AA_MAX_IRQ)
+		panic("dec_kn20aa_intr_map: cfg->intline too large (%d)\n",
+		    cfg->intline);
 }
 
 void
diff --git a/sys/alpha/alpha/dec_st550.c b/sys/alpha/alpha/dec_st550.c
index 5989679..13a5fb6 100644
--- a/sys/alpha/alpha/dec_st550.c
+++ b/sys/alpha/alpha/dec_st550.c
@@ -66,7 +66,7 @@ static void pyxis_intr_enable __P((int));
 static void pyxis_intr_disable __P((int));
 static void st550_intr_enable __P((int));
 static void st550_intr_disable __P((int));
-static int st550_intr_route __P((device_t, device_t, int));
+static void st550_intr_map __P((void *));
 #define ST550_PCI_IRQ_BEGIN 8
 #define ST550_PCI_MAX_IRQ  47
 
@@ -88,7 +88,7 @@ st550_init()
 	platform.iobus = "cia";
 	platform.cons_init = st550_cons_init;
 	platform.pci_intr_init = st550_intr_init;
-	platform.pci_intr_route = st550_intr_route;
+	platform.pci_intr_map = st550_intr_map;
 	platform.pci_intr_disable = st550_intr_disable;
 	platform.pci_intr_enable = st550_intr_enable;
 }
@@ -158,9 +158,12 @@ st550_intr_init()
 	pyxis_intr_enable(7);	/* enable ISA PIC cascade */
 }
 
-static int
-st550_intr_route(device_t pcib, device_t dev, int pin)
+static void
+st550_intr_map(void *arg)
 {
+	pcicfgregs *cfg;
+
+	cfg = (pcicfgregs *)arg;
 
 	/* There are two main variants of Miata: Miata 1 (Intel SIO)
 	 * and Miata {1.5,2} (Cypress).
@@ -175,28 +178,25 @@ st550_intr_route(device_t pcib, device_t dev, int pin)
 	 * There will be no interrupt mapping for these devices, so just
 	 * bail out now.
 	 */
-	/*
-	 * XXX FIXME this code does not match the above description.  
-	 */
-	if (pci_get_bus(dev) == 0) {
+	if(cfg->bus == 0) {
 		if ((hwrpb->rpb_variation & SV_ST_MASK) < SV_ST_MIATA_1_5) {
 			/* Miata 1 */
-			if (pci_get_slot(dev) == 7)
-				return(255);
-			else if (pci_get_function(dev) == 4)
-				return(255);
+			if (cfg->slot == 7)
+				return;
+			else if (cfg->func == 4)
+				return;
 		} else {
 			/* Miata 1.5 or Miata 2 */
-			if (pci_get_slot(dev) == 7) {
-				if (pci_get_function(dev) == 0)
-					return(255);
-				return(255);
+			if (cfg->slot == 7) {
+				if (cfg->func == 0)
+					return;
+				return;
 			}
 		}
 	}
 	/* Account for the PCI interrupt offset. */
 	/* cfg->intline += ST550_PCI_IRQ_BEGIN; */
-	return(255);
+	return;
 }
 
 /*
diff --git a/sys/alpha/alpha/dec_st6600.c b/sys/alpha/alpha/dec_st6600.c
index 26a7d3a..09ab72a 100644
--- a/sys/alpha/alpha/dec_st6600.c
+++ b/sys/alpha/alpha/dec_st6600.c
@@ -54,7 +54,6 @@ static int comcnrate = CONSPEED;
 void st6600_init __P((void));
 static void st6600_cons_init __P((void));
 static void st6600_intr_init __P((void));
-static int st6600_intr_route __P((device_t, device_t, int));
 
 #define ST6600_PCI_IRQ_BEGIN 8
 #define ST6600_PCI_MAX_IRQ  63
@@ -76,7 +75,6 @@ st6600_init()
 	platform.iobus = "tsunami";
 	platform.cons_init = st6600_cons_init;
 	platform.pci_intr_init = st6600_intr_init;
-	platform.pci_intr_route = st6600_intr_route;
 }
 
 extern int comconsole;
@@ -144,10 +142,4 @@ st6600_intr_init()
 	platform.pci_intr_enable(2);	
 }
 
-static int
-st6600_intr_route(device_t pcib, device_t dev, int pin)
-{
-
-	return(255);
-}
 
diff --git a/sys/alpha/include/cpuconf.h b/sys/alpha/include/cpuconf.h
index 66194f9..fd4f3fe 100644
--- a/sys/alpha/include/cpuconf.h
+++ b/sys/alpha/include/cpuconf.h
@@ -72,7 +72,8 @@ extern struct platform {
 	void	(*mcheck_handler) __P((unsigned long, struct trapframe *,
 		unsigned long, unsigned long));
 	void	(*pci_intr_init) __P((void));
-	int     (*pci_intr_route) __P((device_t, device_t, int));
+	void	(*pci_intr_map) __P((void *));
+	int	(*pci_intr_route) __P((device_t, device_t, int)); 
 	void    (*pci_intr_disable) __P((int));
 	void    (*pci_intr_enable) __P((int));
 	int	(*pci_setup_ide_intr) __P((struct device *dev,
diff --git a/sys/alpha/pci/apecs_pci.c b/sys/alpha/pci/apecs_pci.c
index e18daa6..b3c428f 100644
--- a/sys/alpha/pci/apecs_pci.c
+++ b/sys/alpha/pci/apecs_pci.c
@@ -33,7 +33,9 @@
 #include <sys/bus.h>
 #include <machine/bus.h>
 #include <sys/rman.h>
+#include <pci/pcireg.h>
 #include <pci/pcivar.h>
+#include <machine/cpuconf.h>
 #include <machine/swiz.h>
 #include <machine/md_var.h>
 #include <machine/rpb.h>
@@ -166,6 +168,19 @@ u_int32_t
 apecs_pcib_read_config(device_t dev, u_int b, u_int s, u_int f,
 		       u_int reg, int width)
 {
+	pcicfgregs cfg;
+
+	if ((reg == PCIR_INTLINE) && (width == 1) && 
+	     (platform.pci_intr_map != NULL)) {
+		cfg.bus = b;
+		cfg.slot = s;
+		cfg.func = f;
+		cfg.intline = 255;
+		platform.pci_intr_map((void *)&cfg);
+		if (cfg.intline != 255)
+			return cfg.intline;
+	}
+
 	switch (width) {
 	case 1:
 		SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t);
diff --git a/sys/alpha/pci/cia_pci.c b/sys/alpha/pci/cia_pci.c
index a5ae95b..499ce88 100644
--- a/sys/alpha/pci/cia_pci.c
+++ b/sys/alpha/pci/cia_pci.c
@@ -97,7 +97,9 @@
 #include <machine/bus.h>
 #include <machine/md_var.h>
 #include <sys/rman.h>
+#include <pci/pcireg.h>
 #include <pci/pcivar.h>
+#include <machine/cpuconf.h>
 #include <machine/bwx.h>
 #include <machine/swiz.h>
 
@@ -374,6 +376,19 @@ static u_int32_t
 cia_pcib_read_config(device_t dev, int b, int s, int f,
 		     int reg, int width)
 {
+	pcicfgregs cfg;
+
+	if ((reg == PCIR_INTLINE) && (width == 1) && 
+	     (platform.pci_intr_map != NULL)) {
+		cfg.bus = b;
+		cfg.slot = s;
+		cfg.func = f;
+		cfg.intline = 255;
+		platform.pci_intr_map((void *)&cfg);
+		if (cfg.intline != 255)
+			return cfg.intline;
+	}
+
 	if (chipset_bwx)
 		return cia_pcib_bwx_read_config(b, s, f, reg, width);
 	else
diff --git a/sys/alpha/pci/lca_pci.c b/sys/alpha/pci/lca_pci.c
index 70c873a..a0c383f 100644
--- a/sys/alpha/pci/lca_pci.c
+++ b/sys/alpha/pci/lca_pci.c
@@ -34,7 +34,9 @@
 #include <machine/bus.h>
 #include <machine/resource.h>
 #include <sys/rman.h>
+#include <pci/pcireg.h>
 #include <pci/pcivar.h>
+#include <machine/cpuconf.h>
 #include <machine/swiz.h>
 #include <machine/md_var.h>
 
@@ -159,6 +161,19 @@ u_int32_t
 lca_pcib_read_config(device_t dev, u_int b, u_int s, u_int f,
 		     u_int reg, int width)
 {
+	pcicfgregs cfg;
+
+	if ((reg == PCIR_INTLINE) && (width == 1) && 
+	     (platform.pci_intr_map != NULL)) {
+		cfg.bus = b;
+		cfg.slot = s;
+		cfg.func = f;
+		cfg.intline = 255;
+		platform.pci_intr_map((void *)&cfg);
+		if (cfg.intline != 255)
+			return cfg.intline;
+	}
+
 	switch (width) {
 	case 1:
 		CFGREAD(b, s, f, reg, BYTE, u_int8_t);
diff --git a/sys/alpha/pci/t2.c b/sys/alpha/pci/t2.c
index 05c0a0b..815f0be 100644
--- a/sys/alpha/pci/t2.c
+++ b/sys/alpha/pci/t2.c
@@ -371,111 +371,6 @@ t2_attach(device_t dev)
 	return 0;
 }
 
-/*
- * Map pci slot & INTx pin to the ICIC interrupt value for our PCIs.
- */
-
-static int 
-t2_ICIC_slot_to_STDIO_irq(device_t bus, device_t dev, int pin)
-{
-
-	int ret_irq = 0;
-
-	/*
-	 * Return the interrupt pin number for the PCI slots.  
-	 */
-
-	/*
-	 * Generate the proper interrupt conversion for the physical
-	 * PCI slots (for both the primary PCI slots and those behind
-	 * a PPB). 
-	 */
-	/*
-	 * XXX This code is wrong; we need to determine the correct
-	 *     swizzle for devices behind the onboard PCI:PCI bridge
-	 *     and ensure that the generic bridge code doesn't try to
-	 *     reroute them.
-	 */
-	if ((pci_get_slot(dev) >= 6) && (pci_get_slot(dev) <= 9)) {
-		ret_irq = (32 + (4 * (pci_get_slot(dev) - 6))) +
-		    (pin - 1) + (16 * pci_get_bus(dev));
-		return (ret_irq);
-	}
-
-	/* Convert the NCR810A chip behind the PPB */
-	if (pci_get_slot(dev) == 1) {
-		ret_irq = 28;
-		return (ret_irq);
-	}
-
-	/*
-	 * Convert the NCR810A chip on the primary PCI bus or the
-	 * TULIP chip behind the PPB.  There is no system that has
-	 * both, so there really is no sharing going on although it
-	 * looks like it. 
-	 */
-	if ((pci_get_slot(dev) == 4) || (pci_get_slot(dev) == 0)) {
-		ret_irq = 24;
-		return (ret_irq);
-	}
-
-	printf("ICIC invalid pci slot: 0x%x intpin: 0x%x bus num:0x%x\n", 
-	       pci_get_slot(dev), pin, pci_get_bus(dev));
-	return(-1);
-}
-
-/*
- * Map pci slot & INTx pin to STDIO's 8259 irq input value for PCI0.
- */
-
-static int 
-t2_pci0_slot_to_STDIO_irq(device_t bus, device_t dev, int pin)
-{
-
-	switch(pci_get_slot(dev)) {
-	case 0:	/* ethernet (tulip) port */
-		return(0x2);
-	case 1:	/* scsi 810 */
-		return(0x1);
-	case 6:	/* optional slot 0 */
-		switch (pin) {
-		case 1: return(0x0);
-		case 2: return(0x18);
-		case 3: return(0x1a);
-		case 4: return(0x1d);
-		}
-	case 7:	/* optional slot 1 */
-		switch (pin) {
-		case 1: return(0x4);
-		case 2: return(0x19);
-		case 3: return(0x1b);
-		case 4: return(0x1e);
-		}
-	case 8:	/* optional slot 2 */
-		switch (pin) {
-		case 1: return(0x5);
-		case 2: return(0x14);
-		case 3: return(0x1c);
-		case 4: return(0x1f);
-		}
-	default:	/* invalid slot */
-		printf("PCI slot %d unknown\n", pci_get_slot(dev));
-		return(-1);
-	}
-	printf("invalid pci0 intpin slot: 0x%x intpin: 0x%x\n", 
-	       pci_get_slot(dev), pin);
-	return (-1);
-}
-
-int
-t2_intr_route(device_t bus, device_t dev, int pin)
-{
-	if (pci_int_type[0]) {
-		return (t2_ICIC_slot_to_STDIO_irq(bus, dev, pin));
-	} else {
-		return (t2_pci0_slot_to_STDIO_irq(bus, dev, pin));
-	}
-}
 
 /*
  * magical mystery table partly obtained from Linux
diff --git a/sys/alpha/pci/t2var.h b/sys/alpha/pci/t2var.h
index 770f05d..73ec13e 100644
--- a/sys/alpha/pci/t2var.h
+++ b/sys/alpha/pci/t2var.h
@@ -29,4 +29,3 @@
 extern vm_offset_t	sable_lynx_base;
 
 extern void t2_init(void);
-extern int t2_intr_route(device_t, device_t, int);