Fix abuses of cpu_critical_{enter,exit} by converting to

intr_{disable,restore} as well as providing an implemenation of
intr_{disable,restore}.

3 files changed, 13 insertions, 13 deletions

diff --git a/sys/alpha/pci/cia.c b/sys/alpha/pci/cia.c
index 40f205c..3005ea1 100644
--- a/sys/alpha/pci/cia.c
+++ b/sys/alpha/pci/cia.c
@@ -156,14 +156,14 @@ cia_swiz_set_hae_mem(void *arg, u_int32_t pa)
 		 * Seems fairly paranoid but this is what Linux does...
 		 */
 		u_int32_t msb = pa & REG1;
-		critical_t s;
+		register_t s;
 		
-		s = cpu_critical_enter();
+		s = intr_disable();
 		cia_hae_mem = (cia_hae_mem & ~REG1) | msb;
 		REGVAL(CIA_CSR_HAE_MEM) = cia_hae_mem;
 		alpha_mb();
 		cia_hae_mem = REGVAL(CIA_CSR_HAE_MEM);
-		cpu_critical_exit(s);
+		intr_restore(s);
 	}
 	return pa & ~REG1;
 }
@@ -226,9 +226,9 @@ cia_sgmap_invalidate_pyxis(void)
 	volatile u_int64_t dummy;
 	u_int32_t ctrl;
 	int i;
-	critical_t s;
+	register_t s;
 
-	s = cpu_critical_enter();
+	s = intr_disable();
 	
 	/*
 	 * Put the Pyxis into PCI loopback mode.
@@ -259,7 +259,7 @@ cia_sgmap_invalidate_pyxis(void)
 	REGVAL(CIA_CSR_CTRL) = ctrl;
 	alpha_mb();
 
-	cpu_critical_exit(s);
+	intr_restore(s);
 }
 
 static void
diff --git a/sys/alpha/pci/t2.c b/sys/alpha/pci/t2.c
index 3dcfe35..508bc7e 100644
--- a/sys/alpha/pci/t2.c
+++ b/sys/alpha/pci/t2.c
@@ -110,7 +110,7 @@ static u_int32_t	t2_hae_mem[2];
 static u_int32_t
 t2_set_hae_mem(void *arg, u_int32_t pa)
 {
-	int s; 
+	register_t s; 
 	u_int32_t msb;
 	int hose;
 
@@ -120,14 +120,14 @@ t2_set_hae_mem(void *arg, u_int32_t pa)
 		msb = pa & 0xf8000000;
 		pa -= msb;
 		msb >>= 27;	/* t2 puts high bits in the bottom of the register */
-		s = cpu_critical_enter();
+		s = intr_disable();
 		if (msb != t2_hae_mem[hose]) {
 			t2_hae_mem[hose] = msb;
 			t2_csr[hose]->hae0_1 = t2_hae_mem[hose];
 			alpha_mb();
 			t2_hae_mem[hose] = t2_csr[hose]->hae0_1;
 		}
-		cpu_critical_exit(s);
+		intr_restore(s);
 	}
 	return pa;
 }
diff --git a/sys/alpha/pci/t2_pci.c b/sys/alpha/pci/t2_pci.c
index ac2d6a8..cb66912 100644
--- a/sys/alpha/pci/t2_pci.c
+++ b/sys/alpha/pci/t2_pci.c
@@ -92,7 +92,7 @@ t2_pcib_maxslots(device_t dev)
 
 #define T2_TYPE1_SETUP(b,s,old_hae3) if((b)) {			\
         do {							\
-		(s) = cpu_critical_enter();			\
+		(s) = intr_disable();				\
 		(old_hae3) = REGVAL(T2_HAE0_3);			\
 		alpha_mb();					\
 		REGVAL(T2_HAE0_3) = (old_hae3) | (1<<30);	\
@@ -105,13 +105,13 @@ t2_pcib_maxslots(device_t dev)
 		alpha_mb();				\
 		REGVAL(T2_HAE0_3) = (old_hae3);		\
 		alpha_mb();				\
-		cpu_critical_exit((s));			\
+		intr_restore((s));			\
         } while(0);					\
 }
 
 #define SWIZ_CFGREAD(b, s, f, r, width, type) do {			 \
 	type val = ~0;							 \
-	int ipl = 0;							 \
+	register_t ipl = 0;						 \
 	u_int32_t old_hae3 = 0;						 \
 	vm_offset_t off = T2_CFGOFF(b, s, f, r);			 \
 	vm_offset_t kv = SPARSE_##width##_ADDRESS(KV(T2_PCI_CONF), off); \
@@ -125,7 +125,7 @@ t2_pcib_maxslots(device_t dev)
 } while (0)
 
 #define SWIZ_CFGWRITE(b, s, f, r, data, width, type) do {		 \
-	int ipl = 0;							 \
+	register_t ipl = 0;							 \
 	u_int32_t old_hae3 = 0;						 \
 	vm_offset_t off = T2_CFGOFF(b, s, f, r);			 \
 	vm_offset_t kv = SPARSE_##width##_ADDRESS(KV(T2_PCI_CONF), off); \