Resurrect platform.pci_intr_map() and essentially undo the effects of

the interface conversion to platform.pci_intr_route().  I've left the
platform.pci_intr_route() function pointer in place, as well as
alpha_pci_route_interrupt(), but no platform currently implements it.

To work around the removal of alpha_platform_assign_pciintr(cfg);
from the pci probe code, I've hooked in calls to platform.pci_intr_map()
in pcib_read_config (similar to the x86 APIC_IO ifdef in pci_cfgregread)
for every chipset that has a platform which needs it.

While here, I've removed the interupt mapping/routing code from the
AS2x00 platform because its not required (it has never been present in
-stable).

Tested on: UP1000, Miata(GL), XP1000, AS2100, AS500

5 files changed, 45 insertions, 106 deletions

diff --git a/sys/alpha/pci/apecs_pci.c b/sys/alpha/pci/apecs_pci.c
index e18daa6..b3c428f 100644
--- a/sys/alpha/pci/apecs_pci.c
+++ b/sys/alpha/pci/apecs_pci.c
@@ -33,7 +33,9 @@
 #include <sys/bus.h>
 #include <machine/bus.h>
 #include <sys/rman.h>
+#include <pci/pcireg.h>
 #include <pci/pcivar.h>
+#include <machine/cpuconf.h>
 #include <machine/swiz.h>
 #include <machine/md_var.h>
 #include <machine/rpb.h>
@@ -166,6 +168,19 @@ u_int32_t
 apecs_pcib_read_config(device_t dev, u_int b, u_int s, u_int f,
 		       u_int reg, int width)
 {
+	pcicfgregs cfg;
+
+	if ((reg == PCIR_INTLINE) && (width == 1) && 
+	     (platform.pci_intr_map != NULL)) {
+		cfg.bus = b;
+		cfg.slot = s;
+		cfg.func = f;
+		cfg.intline = 255;
+		platform.pci_intr_map((void *)&cfg);
+		if (cfg.intline != 255)
+			return cfg.intline;
+	}
+
 	switch (width) {
 	case 1:
 		SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t);
diff --git a/sys/alpha/pci/cia_pci.c b/sys/alpha/pci/cia_pci.c
index a5ae95b..499ce88 100644
--- a/sys/alpha/pci/cia_pci.c
+++ b/sys/alpha/pci/cia_pci.c
@@ -97,7 +97,9 @@
 #include <machine/bus.h>
 #include <machine/md_var.h>
 #include <sys/rman.h>
+#include <pci/pcireg.h>
 #include <pci/pcivar.h>
+#include <machine/cpuconf.h>
 #include <machine/bwx.h>
 #include <machine/swiz.h>
 
@@ -374,6 +376,19 @@ static u_int32_t
 cia_pcib_read_config(device_t dev, int b, int s, int f,
 		     int reg, int width)
 {
+	pcicfgregs cfg;
+
+	if ((reg == PCIR_INTLINE) && (width == 1) && 
+	     (platform.pci_intr_map != NULL)) {
+		cfg.bus = b;
+		cfg.slot = s;
+		cfg.func = f;
+		cfg.intline = 255;
+		platform.pci_intr_map((void *)&cfg);
+		if (cfg.intline != 255)
+			return cfg.intline;
+	}
+
 	if (chipset_bwx)
 		return cia_pcib_bwx_read_config(b, s, f, reg, width);
 	else
diff --git a/sys/alpha/pci/lca_pci.c b/sys/alpha/pci/lca_pci.c
index 70c873a..a0c383f 100644
--- a/sys/alpha/pci/lca_pci.c
+++ b/sys/alpha/pci/lca_pci.c
@@ -34,7 +34,9 @@
 #include <machine/bus.h>
 #include <machine/resource.h>
 #include <sys/rman.h>
+#include <pci/pcireg.h>
 #include <pci/pcivar.h>
+#include <machine/cpuconf.h>
 #include <machine/swiz.h>
 #include <machine/md_var.h>
 
@@ -159,6 +161,19 @@ u_int32_t
 lca_pcib_read_config(device_t dev, u_int b, u_int s, u_int f,
 		     u_int reg, int width)
 {
+	pcicfgregs cfg;
+
+	if ((reg == PCIR_INTLINE) && (width == 1) && 
+	     (platform.pci_intr_map != NULL)) {
+		cfg.bus = b;
+		cfg.slot = s;
+		cfg.func = f;
+		cfg.intline = 255;
+		platform.pci_intr_map((void *)&cfg);
+		if (cfg.intline != 255)
+			return cfg.intline;
+	}
+
 	switch (width) {
 	case 1:
 		CFGREAD(b, s, f, reg, BYTE, u_int8_t);
diff --git a/sys/alpha/pci/t2.c b/sys/alpha/pci/t2.c
index 05c0a0b..815f0be 100644
--- a/sys/alpha/pci/t2.c
+++ b/sys/alpha/pci/t2.c
@@ -371,111 +371,6 @@ t2_attach(device_t dev)
 	return 0;
 }
 
-/*
- * Map pci slot & INTx pin to the ICIC interrupt value for our PCIs.
- */
-
-static int 
-t2_ICIC_slot_to_STDIO_irq(device_t bus, device_t dev, int pin)
-{
-
-	int ret_irq = 0;
-
-	/*
-	 * Return the interrupt pin number for the PCI slots.  
-	 */
-
-	/*
-	 * Generate the proper interrupt conversion for the physical
-	 * PCI slots (for both the primary PCI slots and those behind
-	 * a PPB). 
-	 */
-	/*
-	 * XXX This code is wrong; we need to determine the correct
-	 *     swizzle for devices behind the onboard PCI:PCI bridge
-	 *     and ensure that the generic bridge code doesn't try to
-	 *     reroute them.
-	 */
-	if ((pci_get_slot(dev) >= 6) && (pci_get_slot(dev) <= 9)) {
-		ret_irq = (32 + (4 * (pci_get_slot(dev) - 6))) +
-		    (pin - 1) + (16 * pci_get_bus(dev));
-		return (ret_irq);
-	}
-
-	/* Convert the NCR810A chip behind the PPB */
-	if (pci_get_slot(dev) == 1) {
-		ret_irq = 28;
-		return (ret_irq);
-	}
-
-	/*
-	 * Convert the NCR810A chip on the primary PCI bus or the
-	 * TULIP chip behind the PPB.  There is no system that has
-	 * both, so there really is no sharing going on although it
-	 * looks like it. 
-	 */
-	if ((pci_get_slot(dev) == 4) || (pci_get_slot(dev) == 0)) {
-		ret_irq = 24;
-		return (ret_irq);
-	}
-
-	printf("ICIC invalid pci slot: 0x%x intpin: 0x%x bus num:0x%x\n", 
-	       pci_get_slot(dev), pin, pci_get_bus(dev));
-	return(-1);
-}
-
-/*
- * Map pci slot & INTx pin to STDIO's 8259 irq input value for PCI0.
- */
-
-static int 
-t2_pci0_slot_to_STDIO_irq(device_t bus, device_t dev, int pin)
-{
-
-	switch(pci_get_slot(dev)) {
-	case 0:	/* ethernet (tulip) port */
-		return(0x2);
-	case 1:	/* scsi 810 */
-		return(0x1);
-	case 6:	/* optional slot 0 */
-		switch (pin) {
-		case 1: return(0x0);
-		case 2: return(0x18);
-		case 3: return(0x1a);
-		case 4: return(0x1d);
-		}
-	case 7:	/* optional slot 1 */
-		switch (pin) {
-		case 1: return(0x4);
-		case 2: return(0x19);
-		case 3: return(0x1b);
-		case 4: return(0x1e);
-		}
-	case 8:	/* optional slot 2 */
-		switch (pin) {
-		case 1: return(0x5);
-		case 2: return(0x14);
-		case 3: return(0x1c);
-		case 4: return(0x1f);
-		}
-	default:	/* invalid slot */
-		printf("PCI slot %d unknown\n", pci_get_slot(dev));
-		return(-1);
-	}
-	printf("invalid pci0 intpin slot: 0x%x intpin: 0x%x\n", 
-	       pci_get_slot(dev), pin);
-	return (-1);
-}
-
-int
-t2_intr_route(device_t bus, device_t dev, int pin)
-{
-	if (pci_int_type[0]) {
-		return (t2_ICIC_slot_to_STDIO_irq(bus, dev, pin));
-	} else {
-		return (t2_pci0_slot_to_STDIO_irq(bus, dev, pin));
-	}
-}
 
 /*
  * magical mystery table partly obtained from Linux
diff --git a/sys/alpha/pci/t2var.h b/sys/alpha/pci/t2var.h
index 770f05d..73ec13e 100644
--- a/sys/alpha/pci/t2var.h
+++ b/sys/alpha/pci/t2var.h
@@ -29,4 +29,3 @@
 extern vm_offset_t	sable_lynx_base;
 
 extern void t2_init(void);
-extern int t2_intr_route(device_t, device_t, int);