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authorgallatin <gallatin@FreeBSD.org>2001-10-20 21:05:14 +0000
committergallatin <gallatin@FreeBSD.org>2001-10-20 21:05:14 +0000
commitd9b89a94d8f1dd075b6beef41c238b2d7b6571cb (patch)
treeb048eaa7a4b0109bea163f71d7f603cefd7001c7 /sys/alpha/pci
parent6142cabba696919546cbbbb627926db7d4d84738 (diff)
downloadFreeBSD-src-d9b89a94d8f1dd075b6beef41c238b2d7b6571cb.zip
FreeBSD-src-d9b89a94d8f1dd075b6beef41c238b2d7b6571cb.tar.gz
- splhigh()/splx() -> critical_enter()/critical_exit()
- fix KV macro in t2_pci.c to include the sable_lynx_base variable so that the T2 CSRs can be found on lynxes. Current should be bootable on lynxes now.
Diffstat (limited to 'sys/alpha/pci')
-rw-r--r--sys/alpha/pci/t2.c4
-rw-r--r--sys/alpha/pci/t2_pci.c6
2 files changed, 5 insertions, 5 deletions
diff --git a/sys/alpha/pci/t2.c b/sys/alpha/pci/t2.c
index dcd9ec4..c8ade0c 100644
--- a/sys/alpha/pci/t2.c
+++ b/sys/alpha/pci/t2.c
@@ -118,14 +118,14 @@ t2_set_hae_mem(void *arg, u_int32_t pa)
msb = pa & 0xf8000000;
pa -= msb;
msb >>= 27; /* t2 puts high bits in the bottom of the register */
- s = splhigh();
+ s = critical_enter();
if (msb != t2_hae_mem[hose]) {
t2_hae_mem[hose] = msb;
t2_csr[hose]->hae0_1 = t2_hae_mem[hose];
alpha_mb();
t2_hae_mem[hose] = t2_csr[hose]->hae0_1;
}
- splx(s);
+ critical_exit(s);
}
return pa;
}
diff --git a/sys/alpha/pci/t2_pci.c b/sys/alpha/pci/t2_pci.c
index 82a650b..87a3dca 100644
--- a/sys/alpha/pci/t2_pci.c
+++ b/sys/alpha/pci/t2_pci.c
@@ -44,7 +44,7 @@
#include "alphapci_if.h"
#include "pcib_if.h"
-#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
+#define KV(pa) ALPHA_PHYS_TO_K0SEG((pa) + sable_lynx_base)
static devclass_t pcib_devclass;
@@ -92,7 +92,7 @@ t2_pcib_maxslots(device_t dev)
#define T2_TYPE1_SETUP(b,s,old_hae3) if((b)) { \
do { \
- (s) = splhigh(); \
+ (s) = critical_enter(); \
(old_hae3) = REGVAL(T2_HAE0_3); \
alpha_mb(); \
REGVAL(T2_HAE0_3) = (old_hae3) | (1<<30); \
@@ -105,7 +105,7 @@ t2_pcib_maxslots(device_t dev)
alpha_mb(); \
REGVAL(T2_HAE0_3) = (old_hae3); \
alpha_mb(); \
- splx((s)); \
+ critical_exit((s)); \
} while(0); \
}
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