Next phase in the PCI subsystem cleanup.

 - Move PCI core code to dev/pci.
 - Split bridge code out into separate modules.
 - Remove the descriptive strings from the bridge drivers.  If you
   want to know what a device is, use pciconf.  Add support for
   broadly identifying devices based on class/subclass, and for
   parsing a preloaded device identification database so that if
   you want to waste the memory, you can identify *anything* we know
   about.
 - Remove machine-dependant code from the core PCI code.  APIC interrupt
   mapping is performed by shadowing the intline register in machine-
   dependant code.
 - Bring interrupt routing support to the Alpha
   (although many platforms don't yet support routing or mapping
   interrupts entirely correctly).  This resulted in spamming
   <sys/bus.h> into more places than it really should have gone.
 - Put sys/dev on the kernel/modules include path.  This avoids
   having to change *all* the pci*.h includes.

1 files changed, 32 insertions, 31 deletions

diff --git a/sys/alpha/pci/t2.c b/sys/alpha/pci/t2.c
index 461376e..0e3c2a0 100644
--- a/sys/alpha/pci/t2.c
+++ b/sys/alpha/pci/t2.c
@@ -382,7 +382,7 @@ t2_attach(device_t dev)
  */
 
 static int 
-t2_ICIC_slot_to_STDIO_irq(pcicfgregs *cfg)
+t2_ICIC_slot_to_STDIO_irq(device_t bus, device_t dev, int pin)
 {
 
 	int ret_irq = 0;
@@ -391,36 +391,42 @@ t2_ICIC_slot_to_STDIO_irq(pcicfgregs *cfg)
 	 * Return the interrupt pin number for the PCI slots.  
 	 */
 
-	if ((cfg->intpin < 1) || (cfg->intpin > 4))
-		return(-1);
-
-	/*  Generate the proper interrupt conversion for the physical
+	/*
+	 * Generate the proper interrupt conversion for the physical
 	 * PCI slots (for both the primary PCI slots and those behind
-	 * a PPB).  */
-
-	if ((cfg->slot >= 6) && (cfg->slot <= 9)) {
-		ret_irq = (32 + (4 * (cfg->slot - 6))) +
-		    (cfg->intpin - 1) + (16 * cfg->secondarybus);
+	 * a PPB). 
+	 */
+	/*
+	 * XXX This code is wrong; we need to determine the correct
+	 *     swizzle for devices behind the onboard PCI:PCI bridge
+	 *     and ensure that the generic bridge code doesn't try to
+	 *     reroute them.
+	 */
+	if ((pci_get_slot(dev) >= 6) && (pci_get_slot(dev) <= 9)) {
+		ret_irq = (32 + (4 * (pci_get_slot(dev) - 6))) +
+		    (pin - 1) + (16 * pci_get_bus(dev));
 		return (ret_irq);
 	}
 
 	/* Convert the NCR810A chip behind the PPB */
-	if (cfg->slot == 1) {
+	if (pci_get_slot(dev) == 1) {
 		ret_irq = 28;
 		return (ret_irq);
 	}
 
-	/* Convert the NCR810A chip on the primary PCI bus or the
+	/*
+	 * Convert the NCR810A chip on the primary PCI bus or the
 	 * TULIP chip behind the PPB.  There is no system that has
 	 * both, so there really is no sharing going on although it
-	 * looks like it.  */
-	if ( (cfg->slot == 4) || (cfg->slot == 0) ) {
+	 * looks like it. 
+	 */
+	if ((pci_get_slot(dev) == 4) || (pci_get_slot(dev) == 0)) {
 		ret_irq = 24;
 		return (ret_irq);
 	}
 
 	printf("ICIC invalid pci slot: 0x%x intpin: 0x%x bus num:0x%x\n", 
-	    cfg->slot, cfg->intpin, cfg->bus);
+	       pci_get_slot(dev), pin, pci_get_bus(dev));
 	return(-1);
 }
 
@@ -429,59 +435,54 @@ t2_ICIC_slot_to_STDIO_irq(pcicfgregs *cfg)
  */
 
 static int 
-t2_pci0_slot_to_STDIO_irq(pcicfgregs *cfg)
+t2_pci0_slot_to_STDIO_irq(device_t bus, device_t dev, int pin)
 {
 
-	switch(cfg->slot) {
+	switch(pci_get_slot(dev)) {
 	case 0:	/* ethernet (tulip) port */
 		return(0x2);
 	case 1:	/* scsi 810 */
 		return(0x1);
 	case 6:	/* optional slot 0 */
-		switch (cfg->intpin) {
+		switch (pin) {
 		case 1: return(0x0);
 		case 2: return(0x18);
 		case 3: return(0x1a);
 		case 4: return(0x1d);
 		}
 	case 7:	/* optional slot 1 */
-		switch (cfg->intpin) {
+		switch (pin) {
 		case 1: return(0x4);
 		case 2: return(0x19);
 		case 3: return(0x1b);
 		case 4: return(0x1e);
 		}
 	case 8:	/* optional slot 2 */
-		switch (cfg->intpin) {
+		switch (pin) {
 		case 1: return(0x5);
 		case 2: return(0x14);
 		case 3: return(0x1c);
 		case 4: return(0x1f);
 		}
 	default:	/* invalid slot */
-		printf("PCI slot %d unknown\n", cfg->slot);
+		printf("PCI slot %d unknown\n", pci_get_slot(dev));
 		return(-1);
 	}
 	printf("invalid pci0 intpin slot: 0x%x intpin: 0x%x\n", 
-	    cfg->slot, cfg->intpin);
+	       pci_get_slot(dev), pin);
 	return (-1);
 }
 
-
-void
-t2_intr_map(void *arg)
+int
+t2_intr_route(device_t bus, device_t dev, int pin)
 {
-	pcicfgregs *cfg;
-
-	cfg = (pcicfgregs *)arg;
 	if (pci_int_type[0]) {
-		t2_ICIC_slot_to_STDIO_irq(cfg);
+		return (t2_ICIC_slot_to_STDIO_irq(bus, dev, pin));
 	} else {
-		t2_pci0_slot_to_STDIO_irq(cfg);
+		return (t2_pci0_slot_to_STDIO_irq(bus, dev, pin));
 	}
 }
 
-
 /*
  * magical mystery table partly obtained from Linux
  * at least some of their values for PCI masks